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fb1b7712ad
Those driver are not DM drivers per se (not using the PMIC/regulator framework) and are using the legacy I2C API. Make them compatible with the DM_I2C API. This impacts the following drivers: - palmas (used by am57xx/dra7xx evms) - tps65218 (used by am43xx evms) - tps65217 and tps65910 (used by am335x evms and am335x boneblack vboot) - twl4030 (used by omap3_logicpd) - tps65217 (used by brppt1) - twl6030 Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
220 lines
5.7 KiB
C
220 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2009 Wind River Systems, Inc.
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* Tom Rix <Tom.Rix at windriver.com>
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*
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* twl4030_power_reset_init is derived from code on omapzoom,
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* git://git.omapzoom.com/repo/u-boot.git
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*
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* Copyright (C) 2007-2009 Texas Instruments, Inc.
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*
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* twl4030_power_init is from cpu/omap3/common.c, power_init_r
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*
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* (C) Copyright 2004-2008
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Sunil Kumar <sunilsaini05 at gmail.com>
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* Shashi Ranjan <shashiranjanmca05 at gmail.com>
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*
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* Derived from Beagle Board and 3430 SDP code by
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* Richard Woodruff <r-woodruff2 at ti.com>
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* Syed Mohammed Khasim <khasim at ti.com>
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*/
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#include <twl4030.h>
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/*
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* Power Reset
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*/
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void twl4030_power_reset_init(void)
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{
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u8 val = 0;
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if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_P1_SW_EVENTS, &val)) {
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printf("Error:TWL4030: failed to read the power register\n");
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printf("Could not initialize hardware reset\n");
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} else {
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val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON;
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if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_P1_SW_EVENTS, val)) {
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printf("Error:TWL4030: failed to write the power register\n");
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printf("Could not initialize hardware reset\n");
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}
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}
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}
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/*
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* Power off
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*/
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void twl4030_power_off(void)
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{
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u8 data;
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/* PM master unlock (CFG and TST keys) */
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data = 0xCE;
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_PROTECT_KEY, data);
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data = 0xEC;
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_PROTECT_KEY, data);
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/* VBAT start disable */
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twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_P1_TRANSITION, &data);
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data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_P1_TRANSITION, data);
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twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_P2_TRANSITION, &data);
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data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_P2_TRANSITION, data);
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twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_P3_TRANSITION, &data);
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data &= ~TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT;
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_P3_TRANSITION, data);
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/* High jitter for PWRANA2 */
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twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_PWRANA2, &data);
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data &= ~(TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV |
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TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV);
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_CFG_PWRANA2, data);
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/* PM master lock */
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data = 0xFF;
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_PROTECT_KEY, data);
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/* Power off */
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twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_P1_SW_EVENTS, &data);
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data |= TWL4030_PM_MASTER_SW_EVENTS_DEVOFF;
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twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
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TWL4030_PM_MASTER_P1_SW_EVENTS, data);
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}
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/*
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* Set Device Group and Voltage
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*/
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void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
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u8 dev_grp, u8 dev_grp_sel)
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{
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int ret;
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/* Select the Voltage */
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ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_reg,
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vsel_val);
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if (ret != 0) {
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printf("Could not write vsel to reg %02x (%d)\n",
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vsel_reg, ret);
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return;
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}
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/* Select the Device Group (enable the supply if dev_grp_sel != 0) */
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ret = twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp,
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dev_grp_sel);
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if (ret != 0)
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printf("Could not write grp_sel to reg %02x (%d)\n",
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dev_grp, ret);
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}
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void twl4030_power_init(void)
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{
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/* set VAUX3 to 2.8V */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED,
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TWL4030_PM_RECEIVER_VAUX3_VSEL_28,
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TWL4030_PM_RECEIVER_VAUX3_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_P1);
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/* set VPLL2 to 1.8V */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED,
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TWL4030_PM_RECEIVER_VPLL2_VSEL_18,
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TWL4030_PM_RECEIVER_VPLL2_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_ALL);
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/* set VDAC to 1.8V */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED,
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TWL4030_PM_RECEIVER_VDAC_VSEL_18,
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TWL4030_PM_RECEIVER_VDAC_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_P1);
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}
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void twl4030_power_mmc_init(int dev_index)
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{
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if (dev_index == 0) {
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/* Set VMMC1 to 3.15 Volts */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED,
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TWL4030_PM_RECEIVER_VMMC1_VSEL_32,
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TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_P1);
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mdelay(100); /* ramp-up delay from Linux code */
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} else if (dev_index == 1) {
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/* Set VMMC2 to 3.15 Volts */
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twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC2_DEDICATED,
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TWL4030_PM_RECEIVER_VMMC2_VSEL_32,
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TWL4030_PM_RECEIVER_VMMC2_DEV_GRP,
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TWL4030_PM_RECEIVER_DEV_GRP_P1);
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mdelay(100); /* ramp-up delay from Linux code */
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}
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}
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#ifdef CONFIG_CMD_POWEROFF
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int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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twl4030_power_off();
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return 0;
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}
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#endif
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#ifdef CONFIG_DM_I2C
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int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_get_chip_for_busnum(0, chip_no, 1, &dev);
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if (ret) {
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pr_err("unable to get I2C bus. ret %d\n", ret);
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return ret;
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}
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ret = dm_i2c_reg_write(dev, reg, val);
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if (ret) {
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pr_err("writing to twl4030 failed. ret %d\n", ret);
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return ret;
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}
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return 0;
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}
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int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *valp)
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{
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struct udevice *dev;
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int ret;
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ret = i2c_get_chip_for_busnum(0, chip_no, 1, &dev);
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if (ret) {
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pr_err("unable to get I2C bus. ret %d\n", ret);
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return ret;
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}
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ret = dm_i2c_reg_read(dev, reg);
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if (ret < 0) {
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pr_err("reading from twl4030 failed. ret %d\n", ret);
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return ret;
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}
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*valp = (u8)ret;
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return 0;
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}
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#endif
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