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ab2a6e82d4
Enable d-cache early in SPL right after DRAM is started up. This reduces U-Boot proper load time by 650ms when loaded from SPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Philip Oberfichtner <pro@denx.de> |
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dh_imx6.c | ||
dh_imx6_spl.c | ||
Kconfig | ||
MAINTAINERS | ||
Makefile |