mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 18:59:44 +00:00
7208396bbf
This reverts commit5d3a21df66, reversing changes made to56d37f1c56. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
136 lines
2.9 KiB
C
136 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <log.h>
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#include <asm/io.h>
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#include <dm/pinctrl.h>
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#include <mach/ar71xx_regs.h>
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DECLARE_GLOBAL_DATA_PTR;
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enum periph_id {
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PERIPH_ID_UART0,
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PERIPH_ID_SPI0,
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PERIPH_ID_NONE = -1,
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};
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struct ar933x_pinctrl_priv {
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void __iomem *regs;
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};
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static void pinctrl_ar933x_spi_config(struct ar933x_pinctrl_priv *priv, int cs)
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{
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switch (cs) {
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case 0:
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clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE,
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AR933X_GPIO(4), AR933X_GPIO(3) |
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AR933X_GPIO(5) | AR933X_GPIO(2));
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setbits_be32(priv->regs + AR71XX_GPIO_REG_FUNC,
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AR933X_GPIO_FUNC_SPI_EN |
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AR933X_GPIO_FUNC_RES_TRUE);
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break;
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}
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}
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static void pinctrl_ar933x_uart_config(struct ar933x_pinctrl_priv *priv, int uart_id)
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{
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switch (uart_id) {
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case PERIPH_ID_UART0:
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clrsetbits_be32(priv->regs + AR71XX_GPIO_REG_OE,
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AR933X_GPIO(9), AR933X_GPIO(10));
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setbits_be32(priv->regs + AR71XX_GPIO_REG_FUNC,
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AR933X_GPIO_FUNC_UART_EN |
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AR933X_GPIO_FUNC_RES_TRUE);
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break;
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}
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}
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static int ar933x_pinctrl_request(struct udevice *dev, int func, int flags)
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{
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struct ar933x_pinctrl_priv *priv = dev_get_priv(dev);
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debug("%s: func=%x, flags=%x\n", __func__, func, flags);
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switch (func) {
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case PERIPH_ID_SPI0:
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pinctrl_ar933x_spi_config(priv, flags);
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break;
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case PERIPH_ID_UART0:
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pinctrl_ar933x_uart_config(priv, func);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int ar933x_pinctrl_get_periph_id(struct udevice *dev,
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struct udevice *periph)
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{
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u32 cell[2];
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int ret;
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ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(periph),
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"interrupts", cell, ARRAY_SIZE(cell));
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if (ret < 0)
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return -EINVAL;
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switch (cell[0]) {
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case 128:
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return PERIPH_ID_UART0;
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case 129:
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return PERIPH_ID_SPI0;
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}
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return -ENOENT;
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}
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static int ar933x_pinctrl_set_state_simple(struct udevice *dev,
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struct udevice *periph)
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{
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int func;
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func = ar933x_pinctrl_get_periph_id(dev, periph);
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if (func < 0)
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return func;
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return ar933x_pinctrl_request(dev, func, 0);
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}
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static struct pinctrl_ops ar933x_pinctrl_ops = {
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.set_state_simple = ar933x_pinctrl_set_state_simple,
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.request = ar933x_pinctrl_request,
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.get_periph_id = ar933x_pinctrl_get_periph_id,
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};
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static int ar933x_pinctrl_probe(struct udevice *dev)
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{
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struct ar933x_pinctrl_priv *priv = dev_get_priv(dev);
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fdt_addr_t addr;
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addr = devfdt_get_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->regs = map_physmem(addr,
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AR71XX_GPIO_SIZE,
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MAP_NOCACHE);
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return 0;
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}
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static const struct udevice_id ar933x_pinctrl_ids[] = {
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{ .compatible = "qca,ar933x-pinctrl" },
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{ }
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};
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U_BOOT_DRIVER(pinctrl_ar933x) = {
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.name = "pinctrl_ar933x",
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.id = UCLASS_PINCTRL,
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.of_match = ar933x_pinctrl_ids,
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.priv_auto_alloc_size = sizeof(struct ar933x_pinctrl_priv),
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.ops = &ar933x_pinctrl_ops,
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.probe = ar933x_pinctrl_probe,
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};
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