u-boot/arch/arm/dts/sun50i-a64-cpu-opp.dtsi
Samuel Holland 7710282334 ARM: dts: sun50i: A64: Sync from Linux v5.18-rc1
Copy the devicetree source for the A64 SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00

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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 Vasily khoruzhick <anarsoul@gmail.com>
*/
/ {
cpu0_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
opp-648000000 {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-912000000 {
opp-hz = /bits/ 64 <912000000>;
opp-microvolt = <1120000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-960000000 {
opp-hz = /bits/ 64 <960000000>;
opp-microvolt = <1160000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1200000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1056000000 {
opp-hz = /bits/ 64 <1056000000>;
opp-microvolt = <1240000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1104000000 {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt = <1260000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp-1152000000 {
opp-hz = /bits/ 64 <1152000000>;
opp-microvolt = <1300000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
};
};
&cpu0 {
operating-points-v2 = <&cpu0_opp_table>;
};
&cpu1 {
operating-points-v2 = <&cpu0_opp_table>;
};
&cpu2 {
operating-points-v2 = <&cpu0_opp_table>;
};
&cpu3 {
operating-points-v2 = <&cpu0_opp_table>;
};