mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
133 lines
3.7 KiB
C
133 lines
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) Excito Elektronik i Skåne AB, All rights reserved.
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* Author: Tor Krill <tor@excito.com>
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*/
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#ifndef SATA_SIL3114_H
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#define SATA_SIL3114_H
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struct sata_ioports {
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unsigned long cmd_addr;
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unsigned long data_addr;
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unsigned long error_addr;
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unsigned long feature_addr;
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unsigned long nsect_addr;
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unsigned long lbal_addr;
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unsigned long lbam_addr;
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unsigned long lbah_addr;
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unsigned long device_addr;
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unsigned long status_addr;
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unsigned long command_addr;
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unsigned long altstatus_addr;
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unsigned long ctl_addr;
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unsigned long bmdma_addr;
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unsigned long scr_addr;
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};
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struct sata_port {
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unsigned char port_no; /* primary=0, secondary=1 */
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struct sata_ioports ioaddr; /* ATA cmd/ctl/dma reg blks */
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unsigned char ctl_reg;
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unsigned char last_ctl;
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unsigned char port_state; /* 1-port is available and */
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/* 0-port is not available */
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unsigned char dev_mask;
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};
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/* Missing ata defines */
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#define ATA_CMD_STANDBY 0xE2
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#define ATA_CMD_STANDBYNOW1 0xE0
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#define ATA_CMD_IDLE 0xE3
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#define ATA_CMD_IDLEIMMEDIATE 0xE1
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/* Defines for SIL3114 chip */
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/* PCI defines */
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#define SIL_VEND_ID 0x1095
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#define SIL3114_DEVICE_ID 0x3114
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/* some vendor specific registers */
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#define VND_SYSCONFSTAT 0x88 /* System Configuration Status and Command */
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#define VND_SYSCONFSTAT_CHN_0_INTBLOCK (1<<22)
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#define VND_SYSCONFSTAT_CHN_1_INTBLOCK (1<<23)
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#define VND_SYSCONFSTAT_CHN_2_INTBLOCK (1<<24)
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#define VND_SYSCONFSTAT_CHN_3_INTBLOCK (1<<25)
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/* internal registers mapped by BAR5 */
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/* SATA Control*/
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#define VND_SCONTROL_CH0 0x100
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#define VND_SCONTROL_CH1 0x180
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#define VND_SCONTROL_CH2 0x300
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#define VND_SCONTROL_CH3 0x380
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#define SATA_SC_IPM_T2P (1<<16)
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#define SATA_SC_IPM_T2S (2<<16)
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#define SATA_SC_SPD_1_5 (1<<4)
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#define SATA_SC_SPD_3_0 (2<<4)
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#define SATA_SC_DET_RST (1) /* ATA Reset sequence */
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#define SATA_SC_DET_PDIS (4) /* PHY Disable */
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/* SATA Status */
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#define VND_SSTATUS_CH0 0x104
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#define VND_SSTATUS_CH1 0x184
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#define VND_SSTATUS_CH2 0x304
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#define VND_SSTATUS_CH3 0x384
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#define SATA_SS_IPM_ACTIVE (1<<8)
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#define SATA_SS_IPM_PARTIAL (2<<8)
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#define SATA_SS_IPM_SLUMBER (6<<8)
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#define SATA_SS_SPD_1_5 (1<<4)
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#define SATA_SS_SPD_3_0 (2<<4)
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#define SATA_DET_P_NOPHY (1) /* Device presence but no PHY connection established */
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#define SATA_DET_PRES (3) /* Device presence and active PHY */
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#define SATA_DET_OFFLINE (4) /* Device offline or in loopback mode */
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/* Task file registers in BAR5 mapping */
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#define VND_TF0_CH0 0x80
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#define VND_TF0_CH1 0xc0
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#define VND_TF0_CH2 0x280
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#define VND_TF0_CH3 0x2c0
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#define VND_TF1_CH0 0x88
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#define VND_TF1_CH1 0xc8
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#define VND_TF1_CH2 0x288
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#define VND_TF1_CH3 0x2c8
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#define VND_TF2_CH0 0x88
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#define VND_TF2_CH1 0xc8
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#define VND_TF2_CH2 0x288
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#define VND_TF2_CH3 0x2c8
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#define VND_BMDMA_CH0 0x00
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#define VND_BMDMA_CH1 0x08
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#define VND_BMDMA_CH2 0x200
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#define VND_BMDMA_CH3 0x208
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#define VND_BMDMA2_CH0 0x10
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#define VND_BMDMA2_CH1 0x18
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#define VND_BMDMA2_CH2 0x210
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#define VND_BMDMA2_CH3 0x218
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/* FIFO control */
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#define VND_FIFOCFG_CH0 0x40
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#define VND_FIFOCFG_CH1 0x44
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#define VND_FIFOCFG_CH2 0x240
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#define VND_FIFOCFG_CH3 0x244
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/* Task File configuration and status */
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#define VND_TF_CNST_CH0 0xa0
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#define VND_TF_CNST_CH1 0xe0
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#define VND_TF_CNST_CH2 0x2a0
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#define VND_TF_CNST_CH3 0x2e0
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#define VND_TF_CNST_BFCMD (1<<1)
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#define VND_TF_CNST_CHNRST (1<<2)
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#define VND_TF_CNST_VDMA (1<<10)
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#define VND_TF_CNST_INTST (1<<11)
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#define VND_TF_CNST_WDTO (1<<12)
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#define VND_TF_CNST_WDEN (1<<13)
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#define VND_TF_CNST_WDIEN (1<<14)
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/* for testing */
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#define VND_SSDR 0x04c /* System Software Data Register */
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#define VND_FMACS 0x050 /* Flash Memory Address control and status */
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#endif
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