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4c57ec76b7
Add a vendor-specific TPM2 command for this and implement it for Cr50. Note: This is not part of the TPM spec, but is a Cr50 extension. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
917 lines
22 KiB
C
917 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Cr50 / H1 TPM support
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*
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* Copyright 2018 Google LLC
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*/
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#define LOG_CATEGORY UCLASS_TPM
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#include <common.h>
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#include <dm.h>
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#include <i2c.h>
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#include <irq.h>
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#include <log.h>
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#include <spl.h>
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#include <tpm-common.h>
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#include <tpm-v2.h>
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#include <acpi/acpigen.h>
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#include <acpi/acpi_device.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/unaligned.h>
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#include <linux/delay.h>
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#include <dm/acpi.h>
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enum {
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TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */
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TIMEOUT_LONG_US = 2 * 1000 * 1000,
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TIMEOUT_SHORT_US = 2 * 1000,
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TIMEOUT_NO_IRQ_US = 20 * 1000,
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TIMEOUT_IRQ_US = 100 * 1000,
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};
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enum {
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CR50_DID_VID = 0x00281ae0L
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};
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enum {
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CR50_MAX_BUF_SIZE = 63,
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};
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/*
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* Operations specific to the Cr50 TPM used on Chromium OS and Android devices
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*
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* FIXME: below is not enough to differentiate between vendors commands
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* of numerous devices. However, the current tpm2 APIs aren't very amenable
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* to extending generically because the marshaling code is assuming all
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* knowledge of all commands.
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*/
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#define TPM2_CC_VENDOR_BIT_MASK 0x20000000
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#define TPM2_CR50_VENDOR_COMMAND (TPM2_CC_VENDOR_BIT_MASK | 0)
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#define TPM2_CR50_SUB_CMD_IMMEDIATE_RESET 19
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#define TPM2_CR50_SUB_CMD_NVMEM_ENABLE_COMMITS 21
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#define TPM2_CR50_SUB_CMD_REPORT_TPM_STATE 23
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#define TPM2_CR50_SUB_CMD_TURN_UPDATE_ON 24
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#define TPM2_CR50_SUB_CMD_GET_REC_BTN 29
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#define TPM2_CR50_SUB_CMD_TPM_MODE 40
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#define TPM2_CR50_SUB_CMD_GET_BOOT_MODE 52
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#define TPM2_CR50_SUB_CMD_RESET_EC 53
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/* Cr50 vendor-specific error codes. */
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#define VENDOR_RC_ERR 0x00000500
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enum cr50_vendor_rc {
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VENDOR_RC_INTERNAL_ERROR = (VENDOR_RC_ERR | 6),
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VENDOR_RC_NO_SUCH_SUBCOMMAND = (VENDOR_RC_ERR | 8),
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VENDOR_RC_NO_SUCH_COMMAND = (VENDOR_RC_ERR | 127),
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};
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enum cr50_tpm_mode {
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/*
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* Default state: TPM is enabled, and may be set to either
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* TPM_MODE_ENABLED or TPM_MODE_DISABLED.
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*/
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TPM_MODE_ENABLED_TENTATIVE = 0,
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/* TPM is enabled, and mode may not be changed. */
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TPM_MODE_ENABLED = 1,
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/* TPM is disabled, and mode may not be changed. */
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TPM_MODE_DISABLED = 2,
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TPM_MODE_INVALID,
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};
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/**
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* struct cr50_priv - Private driver data
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*
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* @ready_gpio: GPIO to use to check if the TPM is ready
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* @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
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* @locality: Currenttly claimed locality (-1 if none)
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* @vendor: vendor: Vendor ID for TPM
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* @use_irq: true to use @irq, false to use @ready if available
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*/
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struct cr50_priv {
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struct gpio_desc ready_gpio;
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struct irq irq;
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int locality;
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uint vendor;
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bool use_irq;
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};
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/*
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* The below structure represents the body of the response to the 'report tpm
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* state' vendor command.
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*
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* It is transferred over the wire, so it needs to be serialized/deserialized,
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* and it is likely to change, so its contents must be versioned.
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*/
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#define TPM_STATE_VERSION 1
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struct tpm_vendor_state {
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u32 version;
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/*
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* The following three fields are set by the TPM in case of an assert.
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* There is no other processing than setting the source code line
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* number, error code and the first 4 characters of the function name.
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*
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* We don't expect this happening, but it is included in the report
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* just in case.
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*/
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u32 fail_line; /* s_failLIne */
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u32 fail_code; /* s_failCode */
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char func_name[4]; /* s_failFunction, limited to 4 chars */
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/*
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* The following two fields are the current time filtered value of the
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* 'failed tries' TPM counter, and the maximum allowed value of the
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* counter.
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*
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* failed_tries == max_tries is the definition of the TPM lockout
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* condition.
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*/
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u32 failed_tries; /* gp.failedTries */
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u32 max_tries; /* gp.maxTries */
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/* The below fields are present in version 2 and above */
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};
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/* Wait for interrupt to indicate TPM is ready */
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static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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ulong timeout, base;
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int i;
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if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) {
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/* Fixed delay if interrupt not supported */
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udelay(TIMEOUT_NO_IRQ_US);
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return 0;
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}
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base = timer_get_us();
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timeout = base + TIMEOUT_IRQ_US;
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i = 0;
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while (priv->use_irq ? !irq_read_and_clear(&priv->irq) :
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!dm_gpio_get_value(&priv->ready_gpio)) {
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i++;
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if ((int)(timer_get_us() - timeout) >= 0) {
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log_warning("Timeout\n");
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/* Use this instead of the -ETIMEDOUT used by i2c */
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return -ETIME;
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}
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}
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log_debug("i=%d\n", i);
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return 0;
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}
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/* Clear pending interrupts */
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static void cr50_i2c_clear_tpm_irq(struct udevice *dev)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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if (priv->use_irq)
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irq_read_and_clear(&priv->irq);
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}
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/*
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* cr50_i2c_read() - read from TPM register
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*
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* @dev: TPM chip information
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* @addr: register address to read from
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* @buffer: provided by caller
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* @len: number of bytes to read
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*
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* 1) send register address byte 'addr' to the TPM
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* 2) wait for TPM to indicate it is ready
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* 3) read 'len' bytes of TPM response into the provided 'buffer'
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*
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* Return 0 on success. -ve on error
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*/
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static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,
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size_t len)
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{
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int ret;
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/* Clear interrupt before starting transaction */
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cr50_i2c_clear_tpm_irq(dev);
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/* Send the register address byte to the TPM */
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ret = dm_i2c_write(dev, 0, &addr, 1);
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if (ret) {
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log_err("Address write failed (err=%d)\n", ret);
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return ret;
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}
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/* Wait for TPM to be ready with response data */
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ret = cr50_i2c_wait_tpm_ready(dev);
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if (ret)
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return ret;
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/* Read response data frrom the TPM */
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ret = dm_i2c_read(dev, 0, buffer, len);
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if (ret) {
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log_err("Read response failed (err=%d)\n", ret);
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return ret;
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}
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return 0;
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}
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/*
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* cr50_i2c_write() - write to TPM register
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*
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* @dev: TPM chip information
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* @addr: register address to write to
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* @buffer: data to write
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* @len: number of bytes to write
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*
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* 1) prepend the provided address to the provided data
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* 2) send the address+data to the TPM
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* 3) wait for TPM to indicate it is done writing
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*
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* Returns -1 on error, 0 on success.
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*/
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static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,
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size_t len)
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{
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u8 buf[len + 1];
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int ret;
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if (len > CR50_MAX_BUF_SIZE) {
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log_err("Length %zd is too large\n", len);
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return -E2BIG;
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}
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/* Prepend the 'register address' to the buffer */
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buf[0] = addr;
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memcpy(buf + 1, buffer, len);
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/* Clear interrupt before starting transaction */
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cr50_i2c_clear_tpm_irq(dev);
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/* Send write request buffer with address */
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ret = dm_i2c_write(dev, 0, buf, len + 1);
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if (ret) {
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log_err("Error writing to TPM (err=%d)\n", ret);
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return ret;
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}
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/* Wait for TPM to be ready */
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return cr50_i2c_wait_tpm_ready(dev);
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}
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static inline u8 tpm_access(int locality)
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{
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if (locality == -1)
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locality = 0;
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return 0x0 | (locality << 4);
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}
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static inline u8 tpm_sts(int locality)
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{
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if (locality == -1)
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locality = 0;
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return 0x1 | (locality << 4);
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}
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static inline u8 tpm_data_fifo(int locality)
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{
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if (locality == -1)
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locality = 0;
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return 0x5 | (locality << 4);
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}
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static inline u8 tpm_did_vid(int locality)
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{
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if (locality == -1)
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locality = 0;
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return 0x6 | (locality << 4);
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}
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static int release_locality(struct udevice *dev, int force)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
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u8 addr = tpm_access(priv->locality);
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int ret;
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u8 buf;
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ret = cr50_i2c_read(dev, addr, &buf, 1);
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if (ret)
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return ret;
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if (force || (buf & mask) == mask) {
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buf = TPM_ACCESS_ACTIVE_LOCALITY;
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cr50_i2c_write(dev, addr, &buf, 1);
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}
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priv->locality = -1;
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return 0;
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}
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/* cr50 requires all 4 bytes of status register to be read */
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static int cr50_i2c_status(struct udevice *dev)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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u8 buf[4];
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int ret;
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ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf));
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if (ret) {
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log_warning("%s: Failed to read status\n", __func__);
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return ret;
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}
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return buf[0];
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}
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/* cr50 requires all 4 bytes of status register to be written */
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static int cr50_i2c_ready(struct udevice *dev)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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u8 buf[4] = { TPM_STS_COMMAND_READY };
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int ret;
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ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf));
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if (ret)
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return ret;
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udelay(TIMEOUT_SHORT_US);
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return 0;
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}
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static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask,
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size_t *burst, int *status)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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ulong timeout;
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u32 buf;
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/*
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* cr50 uses bytes 3:2 of status register for burst count and all 4
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* bytes must be read
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*/
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timeout = timer_get_us() + TIMEOUT_LONG_US;
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while (timer_get_us() < timeout) {
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if (cr50_i2c_read(dev, tpm_sts(priv->locality),
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(u8 *)&buf, sizeof(buf)) < 0) {
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udelay(TIMEOUT_SHORT_US);
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continue;
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}
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*status = buf & 0xff;
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*burst = le16_to_cpu((buf >> 8) & 0xffff);
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if ((*status & mask) == mask &&
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*burst > 0 && *burst <= CR50_MAX_BUF_SIZE)
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return 0;
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udelay(TIMEOUT_SHORT_US);
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}
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log_warning("Timeout reading burst and status\n");
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return -ETIMEDOUT;
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}
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static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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size_t burstcnt, expected, current, len;
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u8 addr = tpm_data_fifo(priv->locality);
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u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
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u32 expected_buf;
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int status;
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int ret;
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log_debug("%s: buf_len=%x\n", __func__, buf_len);
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if (buf_len < TPM_HEADER_SIZE)
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return -E2BIG;
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ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status);
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if (ret < 0) {
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log_warning("First chunk not available\n");
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goto out_err;
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}
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/* Read first chunk of burstcnt bytes */
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if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) {
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log_warning("Read failed\n");
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goto out_err;
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}
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/* Determine expected data in the return buffer */
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memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf));
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expected = be32_to_cpu(expected_buf);
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if (expected > buf_len) {
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log_warning("Too much data: %zu > %zu\n", expected, buf_len);
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goto out_err;
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}
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/* Now read the rest of the data */
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current = burstcnt;
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while (current < expected) {
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/* Read updated burst count and check status */
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if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) {
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log_warning("- burst failure1\n");
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goto out_err;
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}
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len = min(burstcnt, expected - current);
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if (cr50_i2c_read(dev, addr, buf + current, len) != 0) {
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log_warning("Read failed\n");
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goto out_err;
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}
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current += len;
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}
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if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt,
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&status) < 0) {
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log_warning("- burst failure2\n");
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goto out_err;
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}
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if (status & TPM_STS_DATA_AVAIL) {
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log_warning("Data still available\n");
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goto out_err;
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}
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return current;
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out_err:
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/* Abort current transaction if still pending */
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ret = cr50_i2c_status(dev);
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if (ret < 0)
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return ret;
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if (ret & TPM_STS_COMMAND_READY) {
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ret = cr50_i2c_ready(dev);
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if (ret)
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return ret;
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}
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return -EIO;
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}
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static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len)
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{
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struct cr50_priv *priv = dev_get_priv(dev);
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int status;
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size_t burstcnt, limit, sent = 0;
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u8 tpm_go[4] = { TPM_STS_GO };
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ulong timeout;
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int ret;
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log_debug("len=%x\n", len);
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timeout = timer_get_us() + TIMEOUT_LONG_US;
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do {
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ret = cr50_i2c_status(dev);
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if (ret < 0)
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goto out_err;
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if (ret & TPM_STS_COMMAND_READY)
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break;
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if (timer_get_us() > timeout)
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goto out_err;
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ret = cr50_i2c_ready(dev);
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if (ret)
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goto out_err;
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} while (1);
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while (len > 0) {
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u8 mask = TPM_STS_VALID;
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/* Wait for data if this is not the first chunk */
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if (sent > 0)
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mask |= TPM_STS_DATA_EXPECT;
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if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0)
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goto out_err;
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/*
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* Use burstcnt - 1 to account for the address byte
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* that is inserted by cr50_i2c_write()
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*/
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limit = min(burstcnt - 1, len);
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if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality),
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&buf[sent], limit) != 0) {
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log_warning("Write failed\n");
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goto out_err;
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}
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sent += limit;
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len -= limit;
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}
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|
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/* Ensure TPM is not expecting more data */
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if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0)
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goto out_err;
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if (status & TPM_STS_DATA_EXPECT) {
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log_warning("Data still expected\n");
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goto out_err;
|
|
}
|
|
|
|
/* Start the TPM command */
|
|
ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go,
|
|
sizeof(tpm_go));
|
|
if (ret) {
|
|
log_warning("Start command failed\n");
|
|
goto out_err;
|
|
}
|
|
|
|
return sent;
|
|
|
|
out_err:
|
|
/* Abort current transaction if still pending */
|
|
ret = cr50_i2c_status(dev);
|
|
|
|
if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) {
|
|
ret = cr50_i2c_ready(dev);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return -EIO;
|
|
}
|
|
|
|
/**
|
|
* process_reset() - Wait for the Cr50 to reset
|
|
*
|
|
* Cr50 processes reset requests asynchronously and conceivably could be busy
|
|
* executing a long command and not reacting to the reset pulse for a while.
|
|
*
|
|
* This function will make sure that the AP does not proceed with boot until
|
|
* TPM finished reset processing.
|
|
*
|
|
* @dev: Cr50 device
|
|
* Return: 0 if OK, -EPERM if locality could not be taken
|
|
*/
|
|
static int process_reset(struct udevice *dev)
|
|
{
|
|
const int loc = 0;
|
|
u8 access;
|
|
ulong start;
|
|
|
|
/*
|
|
* Locality is released by TPM reset.
|
|
*
|
|
* If locality is taken at this point, this could be due to the fact
|
|
* that the TPM is performing a long operation and has not processed
|
|
* reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if
|
|
* it releases locality when reset is processed.
|
|
*/
|
|
start = get_timer(0);
|
|
do {
|
|
const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
|
|
int ret;
|
|
|
|
ret = cr50_i2c_read(dev, tpm_access(loc),
|
|
&access, sizeof(access));
|
|
if (ret || ((access & mask) == mask)) {
|
|
/*
|
|
* Don't bombard the chip with traffic; let it keep
|
|
* processing the command.
|
|
*/
|
|
mdelay(2);
|
|
continue;
|
|
}
|
|
|
|
log_debug("TPM ready after %ld ms\n", get_timer(start));
|
|
|
|
return 0;
|
|
} while (get_timer(start) < TIMEOUT_INIT_MS);
|
|
|
|
log_err("TPM failed to reset after %ld ms, status: %#x\n",
|
|
get_timer(start), access);
|
|
|
|
return -EPERM;
|
|
}
|
|
|
|
/*
|
|
* Locality could be already claimed (if this is a later U-Boot phase and the
|
|
* read-only U-Boot did not release it), or not yet claimed, if this is TPL or
|
|
* the older read-only U-Boot did release it.
|
|
*/
|
|
static int claim_locality(struct udevice *dev, int loc)
|
|
{
|
|
const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
|
|
struct cr50_priv *priv = dev_get_priv(dev);
|
|
u8 access;
|
|
int ret;
|
|
|
|
ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
|
|
if (ret)
|
|
return log_msg_ret("read1", ret);
|
|
|
|
if ((access & mask) == mask) {
|
|
log_warning("Locality already claimed\n");
|
|
return 0;
|
|
}
|
|
|
|
access = TPM_ACCESS_REQUEST_USE;
|
|
ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access));
|
|
if (ret)
|
|
return log_msg_ret("write", ret);
|
|
|
|
ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
|
|
if (ret)
|
|
return log_msg_ret("read2", ret);
|
|
|
|
if ((access & mask) != mask) {
|
|
log_err("Failed to claim locality\n");
|
|
return -EPERM;
|
|
}
|
|
log_debug("Claimed locality %d\n", loc);
|
|
priv->locality = loc;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size)
|
|
{
|
|
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
|
|
struct cr50_priv *priv = dev_get_priv(dev);
|
|
int len;
|
|
|
|
len = snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x), ",
|
|
chip->chip_addr, priv->vendor >> 16);
|
|
if (priv->use_irq) {
|
|
len += snprintf(buf + len, size - len, "irq=%s/%ld",
|
|
priv->irq.dev->name, priv->irq.id);
|
|
} else if (dm_gpio_is_valid(&priv->ready_gpio)) {
|
|
len += snprintf(buf + len, size - len, "gpio=%s/%u",
|
|
priv->ready_gpio.dev->name,
|
|
priv->ready_gpio.offset);
|
|
} else {
|
|
len += snprintf(buf + len, size - len, "delay=%d",
|
|
TIMEOUT_NO_IRQ_US);
|
|
}
|
|
|
|
return len;
|
|
}
|
|
|
|
static int stringify_state(char *buf, int len, char *str, size_t max_size)
|
|
{
|
|
struct tpm_vendor_state state;
|
|
size_t text_size = 0;
|
|
|
|
state.version = get_unaligned_be32(buf +
|
|
offsetof(struct tpm_vendor_state, version));
|
|
state.fail_line = get_unaligned_be32(buf +
|
|
offsetof(struct tpm_vendor_state, fail_line));
|
|
state.fail_code = get_unaligned_be32(buf +
|
|
offsetof(struct tpm_vendor_state, fail_code));
|
|
memcpy(state.func_name,
|
|
buf + offsetof(struct tpm_vendor_state, func_name),
|
|
sizeof(state.func_name));
|
|
state.failed_tries = get_unaligned_be32(buf +
|
|
offsetof(struct tpm_vendor_state, failed_tries));
|
|
state.max_tries = get_unaligned_be32(buf +
|
|
offsetof(struct tpm_vendor_state, max_tries));
|
|
|
|
text_size += snprintf(str + text_size, max_size - text_size,
|
|
"v=%d", state.version);
|
|
if (text_size >= max_size)
|
|
return -ENOSPC;
|
|
|
|
if (state.version > TPM_STATE_VERSION)
|
|
text_size += snprintf(str + text_size,
|
|
max_size - text_size,
|
|
" not fully supported\n");
|
|
if (text_size >= max_size)
|
|
return -ENOSPC;
|
|
|
|
if (state.version == 0)
|
|
return -EINVAL; /* This should never happen */
|
|
|
|
text_size += snprintf(str + text_size,
|
|
max_size - text_size,
|
|
" failed_tries=%d max_tries=%d\n",
|
|
state.failed_tries, state.max_tries);
|
|
if (text_size >= max_size)
|
|
return -ENOSPC;
|
|
|
|
if (state.fail_line) {
|
|
/* make sure function name is zero terminated. */
|
|
char func_name[sizeof(state.func_name) + 1];
|
|
|
|
memcpy(func_name, state.func_name, sizeof(state.func_name));
|
|
func_name[sizeof(state.func_name)] = '\0';
|
|
|
|
text_size += snprintf(str + text_size,
|
|
max_size - text_size,
|
|
"tpm failed: f %s line %d code %d",
|
|
func_name,
|
|
state.fail_line,
|
|
state.fail_code);
|
|
if (text_size >= max_size)
|
|
return -ENOSPC;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cr50_i2c_report_state(struct udevice *dev, char *str, int str_max)
|
|
{
|
|
char buf[50];
|
|
size_t buf_size = sizeof(buf);
|
|
int ret;
|
|
|
|
ret = tpm2_report_state(dev, TPM2_CR50_VENDOR_COMMAND,
|
|
TPM2_CR50_SUB_CMD_REPORT_TPM_STATE,
|
|
buf, &buf_size);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* TPM responded as expected */
|
|
ret = stringify_state(buf, buf_size, str, str_max);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cr50_i2c_open(struct udevice *dev)
|
|
{
|
|
char buf[80];
|
|
int ret;
|
|
|
|
ret = process_reset(dev);
|
|
if (ret)
|
|
return log_msg_ret("reset", ret);
|
|
|
|
ret = claim_locality(dev, 0);
|
|
if (ret)
|
|
return log_msg_ret("claim", ret);
|
|
|
|
cr50_i2c_get_desc(dev, buf, sizeof(buf));
|
|
log_debug("%s\n", buf);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cr50_i2c_cleanup(struct udevice *dev)
|
|
{
|
|
struct cr50_priv *priv = dev_get_priv(dev);
|
|
|
|
log_debug("cleanup %d\n", priv->locality);
|
|
if (priv->locality != -1)
|
|
release_locality(dev, 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cr50_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
|
|
{
|
|
char scope[ACPI_PATH_MAX];
|
|
char name[ACPI_NAME_MAX];
|
|
const char *hid;
|
|
int ret;
|
|
|
|
ret = acpi_device_scope(dev, scope, sizeof(scope));
|
|
if (ret)
|
|
return log_msg_ret("scope", ret);
|
|
ret = acpi_get_name(dev, name);
|
|
if (ret)
|
|
return log_msg_ret("name", ret);
|
|
|
|
hid = dev_read_string(dev, "acpi,hid");
|
|
if (!hid)
|
|
return log_msg_ret("hid", ret);
|
|
|
|
/* Device */
|
|
acpigen_write_scope(ctx, scope);
|
|
acpigen_write_device(ctx, name);
|
|
acpigen_write_name_string(ctx, "_HID", hid);
|
|
acpigen_write_name_integer(ctx, "_UID",
|
|
dev_read_u32_default(dev, "acpi,uid", 0));
|
|
acpigen_write_name_string(ctx, "_DDN",
|
|
dev_read_string(dev, "acpi,ddn"));
|
|
acpigen_write_sta(ctx, acpi_device_status(dev));
|
|
|
|
/* Resources */
|
|
acpigen_write_name(ctx, "_CRS");
|
|
acpigen_write_resourcetemplate_header(ctx);
|
|
ret = acpi_device_write_i2c_dev(ctx, dev);
|
|
if (ret < 0)
|
|
return log_msg_ret("i2c", ret);
|
|
ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev,
|
|
"ready-gpios");
|
|
if (ret < 0)
|
|
return log_msg_ret("irq_gpio", ret);
|
|
|
|
acpigen_write_resourcetemplate_footer(ctx);
|
|
|
|
acpigen_pop_len(ctx); /* Device */
|
|
acpigen_pop_len(ctx); /* Scope */
|
|
|
|
return 0;
|
|
}
|
|
|
|
enum {
|
|
TPM_TIMEOUT_MS = 5,
|
|
SHORT_TIMEOUT_MS = 750,
|
|
LONG_TIMEOUT_MS = 2000,
|
|
};
|
|
|
|
static int cr50_i2c_of_to_plat(struct udevice *dev)
|
|
{
|
|
struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev);
|
|
struct cr50_priv *priv = dev_get_priv(dev);
|
|
struct irq irq;
|
|
int ret;
|
|
|
|
upriv->version = TPM_V2;
|
|
upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS;
|
|
upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS;
|
|
upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS;
|
|
upriv->retry_time_ms = TPM_TIMEOUT_MS;
|
|
|
|
upriv->pcr_count = 32;
|
|
upriv->pcr_select_min = 2;
|
|
|
|
/* Optional GPIO to track when cr50 is ready */
|
|
ret = irq_get_by_index(dev, 0, &irq);
|
|
if (!ret) {
|
|
priv->irq = irq;
|
|
priv->use_irq = true;
|
|
} else {
|
|
ret = gpio_request_by_name(dev, "ready-gpios", 0,
|
|
&priv->ready_gpio, GPIOD_IS_IN);
|
|
if (ret) {
|
|
log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
|
|
ret);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cr50_i2c_probe(struct udevice *dev)
|
|
{
|
|
struct cr50_priv *priv = dev_get_priv(dev);
|
|
u32 vendor = 0;
|
|
ulong start;
|
|
|
|
/*
|
|
* 150ms should be enough to synchronise with the TPM even under the
|
|
* worst nested-reset-request conditions. In the vast majority of cases
|
|
* there will be no wait at all.
|
|
*/
|
|
start = get_timer(0);
|
|
while (get_timer(start) < 150) {
|
|
int ret;
|
|
|
|
/* Exit once DID and VID verified */
|
|
ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4);
|
|
if (!ret && vendor == CR50_DID_VID)
|
|
break;
|
|
|
|
/* TPM might be resetting; let's retry in a bit */
|
|
mdelay(10);
|
|
}
|
|
if (vendor != CR50_DID_VID) {
|
|
log_warning("DID_VID %08x not recognised\n", vendor);
|
|
return log_msg_ret("vendor-id", -EXDEV);
|
|
}
|
|
priv->vendor = vendor;
|
|
priv->locality = -1;
|
|
log_debug("Cr50 ready\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct acpi_ops cr50_acpi_ops = {
|
|
.fill_ssdt = cr50_acpi_fill_ssdt,
|
|
};
|
|
|
|
static const struct tpm_ops cr50_i2c_ops = {
|
|
.open = cr50_i2c_open,
|
|
.get_desc = cr50_i2c_get_desc,
|
|
.report_state = cr50_i2c_report_state,
|
|
.send = cr50_i2c_send,
|
|
.recv = cr50_i2c_recv,
|
|
.cleanup = cr50_i2c_cleanup,
|
|
};
|
|
|
|
static const struct udevice_id cr50_i2c_ids[] = {
|
|
{ .compatible = "google,cr50" },
|
|
{ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(google_cr50) = {
|
|
.name = "google_cr50",
|
|
.id = UCLASS_TPM,
|
|
.of_match = cr50_i2c_ids,
|
|
.ops = &cr50_i2c_ops,
|
|
.of_to_plat = cr50_i2c_of_to_plat,
|
|
.probe = cr50_i2c_probe,
|
|
.remove = cr50_i2c_cleanup,
|
|
.priv_auto = sizeof(struct cr50_priv),
|
|
ACPI_OPS_PTR(&cr50_acpi_ops)
|
|
.flags = DM_FLAG_OS_PREPARE,
|
|
};
|