u-boot/arch/arm/cpu/armv8/fsl-layerscape
Sumit Garg 710d0cd79e armv8: fsl-layerscape: Allocate Secure memory from first ddr region
This change is required due to trusted OS (OP-TEE) not being position
independent code, it requires compile time fixed base address.

To take care of this it is assumed that all layerscape armv8 platforms
has minimum 2G ddr in first region. So we can have fixed address
space (66 MB -> (2MB for PPA + 64MB for trusted OS)) allocated from
top of first 2G ddr region and compile trusted OS with this fixed
base address.

But one exception here is ls1012 where we have only 1G (rdb) or 512M
(frdm) ddr memory. For those we can have different fixed compile time
base addresses for trusted OS.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-10-09 08:48:44 -07:00
..
doc armv8: ls1088a: Add NXP LS1088A SoC support 2017-09-11 08:00:13 -07:00
cpu.c armv8: fsl-layerscape: Allocate Secure memory from first ddr region 2017-10-09 08:48:44 -07:00
cpu.h armv8/fsl-lsch3: Update code to release secondary cores 2016-11-22 11:38:48 -08:00
fdt.c armv8: fsl: Use correct conditional compile for ls1012a 2017-09-11 08:00:13 -07:00
fsl_lsch2_serdes.c armv8/fsl_lsch2: Add chip power supply voltage setup 2017-01-18 09:29:08 -08:00
fsl_lsch2_speed.c arch: arm: update the IFC IP input clock 2017-02-03 14:31:19 -08:00
fsl_lsch3_serdes.c armv8: ls1088a: Add NXP LS1088A SoC support 2017-09-11 08:00:13 -07:00
fsl_lsch3_speed.c arch: arm: update the IFC IP input clock 2017-02-03 14:31:19 -08:00
Kconfig armv8: Apply workaround for USB erratum A-009007 to LS1088A 2017-10-09 08:36:37 -07:00
lowlevel.S armv8: fsl-layerscape: Add back L3 flushing for all exception levels 2017-09-11 08:02:13 -07:00
ls1012a_serdes.c armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
ls1043a_psci.S ARMv8: LS1043A: Enable LS1043A default PSCI support 2016-12-15 11:57:56 -08:00
ls1043a_serdes.c armv8/ls1043ardb: Add LS1043ARDB board support 2015-10-29 10:34:01 -07:00
ls1046a_serdes.c armv8: fsl_lsch2: Add LS1046A SoC support 2016-07-26 09:02:23 -07:00
ls1088a_serdes.c armv8: ls1088a: Add NXP LS1088A SoC support 2017-09-11 08:00:13 -07:00
ls2080a_serdes.c armv8: ls2080a: Add serdes2 protocol 0x51 support 2017-04-17 09:03:30 -07:00
Makefile armv8: ls1088a: Add NXP LS1088A SoC support 2017-09-11 08:00:13 -07:00
mp.c armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64 2017-08-01 08:28:56 -07:00
ppa.c blk: Remove various places that do flush cache after read 2017-09-15 08:05:10 -04:00
soc.c armv8: Apply workaround for USB erratum A-009007 to LS1088A 2017-10-09 08:36:37 -07:00
spl.c armv8: layerscape: Enabling loading PPA during SPL stage 2017-06-01 19:57:24 -07:00