Simon Glass 7052968707 x86: Do cache set-up by default when booting from coreboot ... A recent change to disable cache setup when booting from coreboot assumed that this has been done by SPL. The result is that for the coreboot board, the cache is disabled (in start.S) and never re-enabled. If the cache was turned off, as it is on boards without SPL, we should turn it back on. Add this new condition. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2021-07-15 19:50:09 +08:00
..
cpu	x86: Don't set up MTRRs if previously done	2021-07-15 19:50:00 +08:00
dts	x86: coral: Show memory config and SKU ID on startup	2021-03-27 16:26:48 +13:00
include/asm	x86: Update the MP constants to avoid conflicts	2021-07-15 19:50:04 +08:00
lib	x86: Do cache set-up by default when booting from coreboot	2021-07-15 19:50:09 +08:00
config.mk	Add support for stack-protector	2021-04-20 07:31:12 -04:00
Kconfig	x86: Move coreboot sysinfo parsing into generic x86 code	2021-03-27 13:59:59 +13:00
Makefile	x86: Allow 16-bit init to be in TPL	2019-05-08 13:02:13 +08:00