Rick Chen 7045ed9f1a riscv: cache: Flush L2 cache before jump to linux ... Flush and disable L2 cache in dcache_disable() which will be called in cleanup_before_linux() before jump to linux. The sequence will be preferred as below: L1 flush -> L1 disable -> L2 flush -> L2 disable Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>		2019-09-03 09:31:03 +08:00
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cpu	riscv: cache: Flush L2 cache before jump to linux	2019-09-03 09:31:03 +08:00
dts	dts: switch spi-flash to jedec, spi-nor compatible	2019-04-12 10:54:27 +05:30
include/asm	riscv: add SPL support	2019-08-26 16:07:42 +08:00
lib	riscv: andes_plic: init plic by scanning each cpu node	2019-09-03 09:30:54 +08:00
config.mk	riscv: qemu: define standalone load address	2019-01-15 09:36:31 +08:00
Kconfig	riscv: add SPL support	2019-08-26 16:07:42 +08:00
Makefile	riscv: add Kconfig entries for the code model	2018-12-18 09:56:26 +08:00