mirror of
https://github.com/AsahiLinux/u-boot
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9aea95307f
- support larger DDR memories up to 2G on the PC8540/8560ADS and STXGP3 boards - Made MPC8540/8560ADS be 33Mhz PCI by default. - Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16 and CONFIG_L2_INIT_RAM options. - Refactor Local Bus initialization out of SDRAM setup. - Re-implement new version of LBC11/DDR11 errata workarounds. - Moved board specific PCI init parts out of CPU directory. - Added TLB entry for PCI-1 IO Memory - Updated README.mpc85xxads
515 lines
12 KiB
C
515 lines
12 KiB
C
/*
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* (C) Copyright 2003, Dan Malek, Embedded Edge, LLC. <dan@embeddededge.com>
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* Copied from ADS85xx.
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* Updated to support the Silicon Tx GP3 8560. We should only find
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* two Intel 28F640 parts in 16-bit mode (i.e. 32-bit wide flash),
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* but I left other code here in case people order custom boards.
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*
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* (C) Copyright 2003 Motorola Inc.
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* Xianghua Xiao,(X.Xiao@motorola.com)
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*
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* (C) Copyright 2000, 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
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* Add support the Sharp chips on the mpc8260ads.
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* I started with board/ip860/flash.c and made changes I found in
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* the MTD project by David Schleef.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#if !defined(CFG_NO_FLASH)
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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#if defined(CFG_ENV_IS_IN_FLASH)
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# ifndef CFG_ENV_ADDR
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# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
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# endif
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# ifndef CFG_ENV_SIZE
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# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
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# endif
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# ifndef CFG_ENV_SECT_SIZE
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# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
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# endif
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#endif
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#undef DEBUG
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info);
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static int write_word (flash_info_t *info, ulong dest, ulong data);
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static int clear_block_lock_bit(vu_long * addr);
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init (void)
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{
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unsigned long size;
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int i;
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/* Init: enable write,
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* or we cannot even write flash commands
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*/
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for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
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flash_info[i].flash_id = FLASH_UNKNOWN;
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/* set the default sector offset */
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}
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/* Static FLASH Bank configuration here - FIXME XXX */
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size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
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if (flash_info[0].flash_id == FLASH_UNKNOWN) {
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printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
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size, size<<20);
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}
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/* Re-do sizing to get full correct info */
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size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
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flash_info[0].size = size;
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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/* monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[0]);
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#ifdef CFG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
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&flash_info[0]);
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#endif
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#endif
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return (size);
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL: printf ("Intel "); break;
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case FLASH_MAN_SHARP: printf ("Sharp "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F640C3T: printf ("28F640C3T (64 Mbit x 2, 128 x 128k)\n");
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break;
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default: printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " "
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);
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}
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printf ("\n");
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info)
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{
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short i;
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ulong value;
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ulong base = (ulong)addr;
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ulong sector_offset;
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#ifdef DEBUG
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printf("Check flash at 0x%08x\n",(uint)addr);
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#endif
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/* Write "Intelligent Identifier" command: read Manufacturer ID */
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*addr = 0x90909090;
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udelay(20);
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asm("sync");
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value = addr[0] & 0x00FF00FF;
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#ifdef DEBUG
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printf("manufacturer=0x%x\n",(uint)value);
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#endif
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switch (value) {
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case MT_MANUFACT: /* SHARP, MT or => Intel */
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case INTEL_ALT_MANU:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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printf("unknown manufacturer: %x\n", (unsigned int)value);
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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return (0); /* no or unknown flash */
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}
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value = addr[1]; /* device ID */
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#ifdef DEBUG
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printf("deviceID=0x%x\n",(uint)value);
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#endif
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switch (value) {
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case (INTEL_ID_28F640C3T):
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info->flash_id += FLASH_28F640C3T;
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info->sector_count = 135;
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info->size = 0x01000000;
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sector_offset = 0x20000;
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break; /* => 2x8 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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return (0); /* => no or unknown flash */
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}
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/* set up sector start address table
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* The first 127 blocks are large, the last 8 are small.
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*/
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for (i = 0; i < 127; i++) {
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info->start[i] = base;
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base += sector_offset;
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/* Sectors are locked upon reset */
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info->protect[i] = 0;
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}
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for (i = 127; i < 135; i++) {
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info->start[i] = base;
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base += 0x4000;
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/* Sectors are locked upon reset */
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info->protect[i] = 0;
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}
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/*
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* Prevent writes to uninitialized FLASH.
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*/
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if (info->flash_id != FLASH_UNKNOWN) {
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addr = (vu_long *)info->start[0];
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*addr = 0xFFFFFF; /* reset bank to read array mode */
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asm("sync");
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}
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return (info->size);
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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int flag, prot, sect;
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ulong start, now, last;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
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&& ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
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printf ("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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prot = 0;
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for (sect=s_first; sect<=s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf ("\n");
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}
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#ifdef DEBUG
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printf("\nFlash Erase:\n");
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#endif
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/* Make Sure Block Lock Bit is not set. */
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if(clear_block_lock_bit((vu_long *)(info->start[s_first]))){
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return 1;
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}
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/* Start erase on unprotected sectors */
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#if defined(DEBUG)
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printf("Begin to erase now,s_first=0x%x s_last=0x%x...\n",s_first,s_last);
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#endif
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for (sect = s_first; sect<=s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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vu_long *addr = (vu_long *)(info->start[sect]);
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asm("sync");
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last = start = get_timer (0);
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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/* Reset Array */
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*addr = 0xffffffff;
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asm("sync");
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/* Clear Status Register */
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*addr = 0x50505050;
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asm("sync");
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/* Single Block Erase Command */
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*addr = 0x20202020;
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asm("sync");
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/* Confirm */
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*addr = 0xD0D0D0D0;
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asm("sync");
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if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
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/* Resume Command, as per errata update */
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*addr = 0xD0D0D0D0;
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asm("sync");
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}
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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while ((*addr & 0x00800080) != 0x00800080) {
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if(*addr & 0x00200020){
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printf("Error in Block Erase - Lock Bit may be set!\n");
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printf("Status Register = 0x%X\n", (uint)*addr);
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*addr = 0xFFFFFFFF; /* reset bank */
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asm("sync");
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return 1;
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}
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if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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*addr = 0xFFFFFFFF; /* reset bank */
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asm("sync");
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return 1;
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}
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/* show that we're waiting */
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if ((now - last) > 1000) { /* every second */
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putc ('.');
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last = now;
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}
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}
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/* reset to read mode */
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*addr = 0xFFFFFFFF;
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asm("sync");
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}
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}
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printf ("flash erase done\n");
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return 0;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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ulong cp, wp, data;
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int i, l, rc;
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wp = (addr & ~3); /* get lower word aligned address */
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/*
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* handle unaligned start bytes
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*/
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if ((l = addr - wp) != 0) {
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data = 0;
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for (i=0, cp=wp; i<l; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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for (; i<4 && cnt>0; ++i) {
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data = (data << 8) | *src++;
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--cnt;
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++cp;
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}
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for (; cnt==0 && i<4; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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if ((rc = write_word(info, wp, data)) != 0) {
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return (rc);
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}
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wp += 4;
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}
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/*
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* handle word aligned part
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*/
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while (cnt >= 4) {
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data = 0;
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for (i=0; i<4; ++i) {
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data = (data << 8) | *src++;
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}
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if ((rc = write_word(info, wp, data)) != 0) {
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return (rc);
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}
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wp += 4;
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cnt -= 4;
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}
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if (cnt == 0) {
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return (0);
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}
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/*
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* handle unaligned tail bytes
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*/
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data = 0;
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for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
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data = (data << 8) | *src++;
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--cnt;
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}
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for (; i<4; ++i, ++cp) {
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data = (data << 8) | (*(uchar *)cp);
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}
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return (write_word(info, wp, data));
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}
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/*-----------------------------------------------------------------------
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* Write a word to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_word (flash_info_t *info, ulong dest, ulong data)
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{
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vu_long *addr = (vu_long *)dest;
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ulong start, csr;
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int flag;
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/* Check if Flash is (sufficiently) erased */
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if ((*addr & data) != data) {
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return (2);
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}
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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/* Write Command */
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*addr = 0x10101010;
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asm("sync");
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/* Write Data */
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*addr = data;
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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/* data polling for D7 */
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start = get_timer (0);
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flag = 0;
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while (((csr = *addr) & 0x00800080) != 0x00800080) {
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if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
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flag = 1;
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break;
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}
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}
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if (csr & 0x40404040) {
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printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
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flag = 1;
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}
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/* Clear Status Registers Command */
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*addr = 0x50505050;
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asm("sync");
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/* Reset to read array mode */
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*addr = 0xFFFFFFFF;
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asm("sync");
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return (flag);
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}
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/*-----------------------------------------------------------------------
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* Clear Block Lock Bit, returns:
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* 0 - OK
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* 1 - Timeout
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*/
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static int clear_block_lock_bit(vu_long * addr)
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{
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ulong start, now;
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/* Reset Array */
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*addr = 0xffffffff;
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asm("sync");
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/* Clear Status Register */
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*addr = 0x50505050;
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asm("sync");
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*addr = 0x60606060;
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asm("sync");
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*addr = 0xd0d0d0d0;
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asm("sync");
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start = get_timer (0);
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while((*addr & 0x00800080) != 0x00800080){
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if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout on clearing Block Lock Bit\n");
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*addr = 0xFFFFFFFF; /* reset bank */
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asm("sync");
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return 1;
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}
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}
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return 0;
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}
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#endif /* !CFG_NO_FLASH */
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