u-boot/arch/arm/mach-mediatek/mt8516/init.c
Harald Seiler 35b65dd8ef reset: Remove addr parameter from reset_cpu()
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to.  This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value.  Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.

Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g.  COLD vs WARM resets).  As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).

To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely.  Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.

This transformation was done with the following coccinelle patch:

    @@
    expression argvalue;
    @@
    - reset_cpu(argvalue)
    + reset_cpu()

    @@
    identifier argname;
    type argtype;
    @@
    - reset_cpu(argtype argname)
    + reset_cpu(void)
    { ... }

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02 14:03:02 -05:00

117 lines
2.1 KiB
C

// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018 MediaTek Inc.
* Copyright (C) 2019 BayLibre, SAS
* Author: Fabien Parent <fparent@baylibre.com>
*/
#include <clk.h>
#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
#include <init.h>
#include <ram.h>
#include <asm/arch/misc.h>
#include <asm/armv8/mmu.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/sections.h>
#include <dm/uclass.h>
#include <dt-bindings/clock/mt8516-clk.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
int ret;
ret = fdtdec_setup_memory_banksize();
if (ret)
return ret;
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = gd->ram_base;
gd->bd->bi_dram[0].size = gd->ram_size;
return 0;
}
int mtk_pll_early_init(void)
{
unsigned long pll_rates[] = {
[CLK_APMIXED_ARMPLL] = 1300000000,
[CLK_APMIXED_MAINPLL] = 1501000000,
[CLK_APMIXED_UNIVPLL] = 1248000000,
[CLK_APMIXED_MMPLL] = 380000000,
};
struct udevice *dev;
int ret, i;
ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_DRIVER_GET(mtk_clk_apmixedsys), &dev);
if (ret)
return ret;
/* configure default rate then enable apmixedsys */
for (i = 0; i < ARRAY_SIZE(pll_rates); i++) {
struct clk clk = { .id = i, .dev = dev };
ret = clk_set_rate(&clk, pll_rates[i]);
if (ret)
return ret;
ret = clk_enable(&clk);
if (ret)
return ret;
}
return 0;
}
int mtk_soc_early_init(void)
{
int ret;
/* initialize early clocks */
ret = mtk_pll_early_init();
if (ret)
return ret;
return 0;
}
void reset_cpu(void)
{
psci_system_reset();
}
int print_cpuinfo(void)
{
printf("CPU: MediaTek MT8516\n");
return 0;
}
static struct mm_region mt8516_mem_map[] = {
{
/* DDR */
.virt = 0x40000000UL,
.phys = 0x40000000UL,
.size = 0x20000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
}, {
.virt = 0x00000000UL,
.phys = 0x00000000UL,
.size = 0x20000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
0,
}
};
struct mm_region *mem_map = mt8516_mem_map;