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https://github.com/AsahiLinux/u-boot
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f2b85ab5e6
At present this SPI driver works by searching the PCI buses for its peripheral. It also uses the legacy PCI API. In addition the driver has code to determine the type of Intel PCH that is used (version 7 or version 9). Now that we have proper PCH drivers we can use those to obtain the information we need. While the device tree has a node for the SPI peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the LPC device. Update the device tree files to show the SPI controller within the PCH, so that PCI access works as expected. This patch includes Bin's fix-up patch from here: https://patchwork.ozlabs.org/patch/569478/ Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
73 lines
1.3 KiB
Text
73 lines
1.3 KiB
Text
/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include <dt-bindings/interrupt-router/intel-irq.h>
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/include/ "skeleton.dtsi"
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/include/ "serial.dtsi"
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/include/ "keyboard.dtsi"
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/include/ "rtc.dtsi"
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/include/ "tsc_timer.dtsi"
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/ {
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model = "QEMU x86 (I440FX)";
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compatible = "qemu,x86";
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config {
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silent_console = <0>;
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};
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chosen {
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stdout-path = "/serial";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "cpu-qemu";
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reg = <0>;
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intel,apic-id = <0>;
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};
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};
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tsc-timer {
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clock-frequency = <1000000000>;
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};
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pci {
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compatible = "pci-x86";
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#address-cells = <3>;
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#size-cells = <2>;
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u-boot,dm-pre-reloc;
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ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
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0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
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0x01000000 0x0 0x2000 0x2000 0 0xe000>;
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pch@1,0 {
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reg = <0x00000800 0 0 0 0>;
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compatible = "intel,pch7";
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irq-router {
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compatible = "intel,irq-router";
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intel,pirq-config = "pci";
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intel,pirq-link = <0x60 4>;
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intel,pirq-mask = <0x0e40>;
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intel,pirq-routing = <
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/* PIIX UHCI */
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PCI_BDF(0, 1, 2) INTD PIRQD
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/* e1000 NIC */
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PCI_BDF(0, 3, 0) INTA PIRQC
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>;
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};
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};
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};
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};
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