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fd3dc72945
Copy definition of L2 cache node from upstream Linux kernel P2020 dts files. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
33 lines
558 B
Text
33 lines
558 B
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* P2020 Silicon/SoC Device Tree Source (pre include)
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*
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* Copyright 2013 Freescale Semiconductor Inc.
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* Copyright 2019 NXP
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*/
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/dts-v1/;
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/include/ "e500v2_power_isa.dtsi"
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/ {
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mpic>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: PowerPC,P2020@0 {
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device_type = "cpu";
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reg = <0>;
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next-level-cache = <&L2>;
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};
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cpu1: PowerPC,P2020@1 {
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device_type = "cpu";
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reg = <1>;
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next-level-cache = <&L2>;
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};
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};
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};
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