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https://github.com/AsahiLinux/u-boot
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6e38e2ea79
In all the ZynqMP boards dts files tx-buswidth is by default set to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4 in ZynqMP boards dts files. This would enable the spi-nor framework to issue 1-4-4 write commands instead of 1-1-1. This will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ad61199f55e5e00f29de6206d9d1872a52a7657e.1652193179.git.michal.simek@amd.com
116 lines
1.9 KiB
Text
116 lines
1.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Topic XDP (Xilinx Drone Platform)
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*
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* (C) Copyright 2016, Topic Embedded Products BV
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* Mike Looijmans <mike.looijmans@topic.nl>
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*/
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/dts-v1/;
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#include "zynqmp.dtsi"
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#include "zynqmp-clk-ccf.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/phy/phy.h>
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/ {
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model = "Topic Miamimp ZynqMP XDP v1r1";
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compatible = "topic,miamimp-xdp-v1r1", "topic,miamimp-xdp",
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"topic,miamimp", "xlnx,zynqmp";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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rtc0 = &rtc;
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serial0 = &uart1;
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serial1 = &uart0;
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serial2 = &dcc;
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spi0 = &qspi;
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usb0 = &usb0;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
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};
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};
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&dcc {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&gpu {
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status = "okay";
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};
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&qspi {
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status = "okay";
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is-dual = <1>;
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flash@0 {
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compatible = "st,m25p80", "n25q256a", "jedec,spi-nor";
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m25p,fast-read;
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reg = <0x0>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <166000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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is-dual = <1>;
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partition@0 {
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label = "qspi-boot-bin";
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reg = <0x00000 0x60000>;
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};
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partition@60000 {
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label = "qspi-u-boot-itb";
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reg = <0x60000 0x100000>;
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};
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partition@160000 {
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label = "qspi-u-boot-env";
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reg = <0x160000 0x20000>;
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};
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partition@200000 {
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label = "qspi-rootfs";
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reg = <0x200000 0x1e00000>;
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};
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};
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};
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&rtc {
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status = "okay";
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};
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/* eMMC device */
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&sdhci0 {
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status = "okay";
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non-removable;
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disable-wp; /* We don't have a write-protect detection */
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bus-width = <8>;
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xlnx,mio-bank = <0>;
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};
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/* SD1 with level shifter */
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&sdhci1 {
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status = "okay";
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xlnx,mio-bank = <1>;
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disable-wp; /* We don't have a write-protect detection */
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bus-width = <4>;
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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