u-boot/arch/arm/dts/ast2600-evb.dts
Chin-Ting Kuo d37b4f37ea arm: dts: aspeed: Update SPI flash node settings
For both AST2500 and AST2600, there are three
SPI controllers, FMC(Firmware Memory Controller),
SPI1 and SPI2. The clock source is HCLK. Following
is the basic information for ASPEED SPI controller.

AST2500:
  - FMC:
      CS number: 3
      controller reg: 0x1e620000 - 0x1e62ffff
      decoded address: 0x20000000 - 0x2fffffff

  - SPI1:
      CS number: 2
      controller reg: 0x1e630000 - 0x1e630fff
      decoded address: 0x30000000 - 0x37ffffff

  - SPI2:
      CS number: 2
      controller reg: 0x1e631000 - 0x1e631fff
      decoded address: 0x38000000 - 0x3fffffff

AST2600:
  - FMC:
      CS number: 3
      controller reg: 0x1e620000 - 0x1e62ffff
      decoded address: 0x20000000 - 0x2fffffff

  - SPI1:
      CS number: 2
      controller reg: 0x1e630000 - 0x1e630fff
      decoded address: 0x30000000 - 0x3fffffff

  - SPI2:
      CS number: 3
      controller reg: 0x1e631000 - 0x1e631fff
      decoded address: 0x50000000 - 0x5fffffff

Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
2022-09-13 12:08:40 -04:00

268 lines
4.1 KiB
Text

// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "ast2600-u-boot.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
chosen {
stdout-path = &uart5;
};
aliases {
mmc0 = &emmc;
mmc1 = &sdhci0;
mmc2 = &sdhci1;
spi0 = &fmc;
spi1 = &spi1;
spi2 = &spi2;
ethernet0 = &mac0;
ethernet1 = &mac1;
ethernet2 = &mac2;
ethernet3 = &mac3;
};
cpus {
cpu@0 {
clock-frequency = <800000000>;
};
cpu@1 {
clock-frequency = <800000000>;
};
};
};
&pwm {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default
&pinctrl_pwm7_default
&pinctrl_pwm8g1_default
&pinctrl_pwm9g1_default
&pinctrl_pwm10g1_default
&pinctrl_pwm11g1_default
&pinctrl_pwm12g1_default
&pinctrl_pwm13g1_default
&pinctrl_pwm14g1_default>;
};
&uart5 {
u-boot,dm-pre-reloc;
status = "okay";
};
&sdrammc {
clock-frequency = <400000000>;
};
&wdt1 {
status = "okay";
};
&fmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fmcquad_default>;
flash@0 {
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
flash@1 {
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
flash@2 {
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
&pinctrl_spi1cs1_default &pinctrl_spi1wp_default
&pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
flash@0 {
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&spi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
&pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
flash@0 {
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
&emmc_controller {
status = "okay";
};
&emmc {
non-removable;
bus-width = <4>;
max-frequency = <100000000>;
clk-phase-mmc-hs200 = <9>, <225>;
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
temp@2e {
compatible = "adi,adt7490";
reg = <0x2e>;
};
eeprom@50 {
compatible = "atmel,24c08";
reg = <0x50>;
pagesize = <16>;
};
};
&i2c8 {
status = "okay";
lm75@4d {
compatible = "national,lm75";
reg = <0x4d>;
};
};
&mdio0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&mdio1 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@0 {
reg = <0>;
};
};
&mdio2 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
ethphy2: ethernet-phy@0 {
reg = <0>;
};
};
&mdio3 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
ethphy3: ethernet-phy@0 {
reg = <0>;
};
};
&mac0 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-handle = <&ethphy0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default>;
};
&mac1 {
status = "okay";
phy-mode = "rgmii-rxid";
phy-handle = <&ethphy1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default>;
};
&mac2 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&ethphy2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii3_default>;
};
&mac3 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&ethphy3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii4_default>;
};
&scu {
mac0-clk-delay = <0x1d 0x1c
0x10 0x17
0x10 0x17>;
mac1-clk-delay = <0x1d 0x10
0x10 0x10
0x10 0x10>;
mac2-clk-delay = <0x0a 0x04
0x08 0x04
0x08 0x04>;
mac3-clk-delay = <0x0a 0x04
0x08 0x04
0x08 0x04>;
};
&hace {
u-boot,dm-pre-reloc;
status = "okay";
};
&acry {
u-boot,dm-pre-reloc;
status = "okay";
};