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https://github.com/AsahiLinux/u-boot
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c05ed00afb
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
169 lines
4 KiB
C
169 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#include <common.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <linux/delay.h>
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#include "seq_exec.h"
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#include "high_speed_env_spec.h"
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#include "../../../drivers/ddr/marvell/a38x/ddr3_init.h"
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#if defined(MV_DEBUG_INIT_FULL) || defined(MV_DEBUG)
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#define DB(x) x
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#else
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#define DB(x)
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#endif
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/* Array for mapping the operation (write, poll or delay) functions */
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op_execute_func_ptr op_execute_func_arr[] = {
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write_op_execute,
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delay_op_execute,
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poll_op_execute
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};
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int write_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
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{
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u32 unit_base_reg, unit_offset, data, mask, reg_data, reg_addr;
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/* Getting write op params from the input parameter */
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data = params->data[data_arr_idx];
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mask = params->mask;
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/* an empty operation */
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if (data == NO_DATA)
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return MV_OK;
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/* get updated base address since it can be different between Serdes */
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CHECK_STATUS(hws_get_ext_base_addr(serdes_num, params->unit_base_reg,
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params->unit_offset,
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&unit_base_reg, &unit_offset));
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/* Address calculation */
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reg_addr = unit_base_reg + unit_offset * serdes_num;
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#ifdef SEQ_DEBUG
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printf("Write: 0x%x: 0x%x (mask 0x%x) - ", reg_addr, data, mask);
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#endif
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/* Reading old value */
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reg_data = reg_read(reg_addr);
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reg_data &= (~mask);
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/* Writing new data */
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data &= mask;
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reg_data |= data;
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reg_write(reg_addr, reg_data);
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#ifdef SEQ_DEBUG
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printf(" - 0x%x\n", reg_data);
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#endif
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return MV_OK;
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}
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int delay_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
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{
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u32 delay;
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/* Getting delay op params from the input parameter */
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delay = params->wait_time;
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#ifdef SEQ_DEBUG
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printf("Delay: %d\n", delay);
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#endif
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mdelay(delay);
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return MV_OK;
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}
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int poll_op_execute(u32 serdes_num, struct op_params *params, u32 data_arr_idx)
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{
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u32 unit_base_reg, unit_offset, data, mask, num_of_loops, wait_time;
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u32 poll_counter = 0;
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u32 reg_addr, reg_data;
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/* Getting poll op params from the input parameter */
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data = params->data[data_arr_idx];
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mask = params->mask;
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num_of_loops = params->num_of_loops;
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wait_time = params->wait_time;
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/* an empty operation */
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if (data == NO_DATA)
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return MV_OK;
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/* get updated base address since it can be different between Serdes */
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CHECK_STATUS(hws_get_ext_base_addr(serdes_num, params->unit_base_reg,
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params->unit_offset,
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&unit_base_reg, &unit_offset));
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/* Address calculation */
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reg_addr = unit_base_reg + unit_offset * serdes_num;
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/* Polling */
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#ifdef SEQ_DEBUG
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printf("Poll: 0x%x: 0x%x (mask 0x%x)\n", reg_addr, data, mask);
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#endif
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do {
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reg_data = reg_read(reg_addr) & mask;
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poll_counter++;
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udelay(wait_time);
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} while ((reg_data != data) && (poll_counter < num_of_loops));
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if ((poll_counter >= num_of_loops) && (reg_data != data)) {
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DEBUG_INIT_S("poll_op_execute: TIMEOUT\n");
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return MV_TIMEOUT;
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}
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return MV_OK;
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}
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enum mv_op get_cfg_seq_op(struct op_params *params)
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{
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if (params->wait_time == 0)
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return WRITE_OP;
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else if (params->num_of_loops == 0)
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return DELAY_OP;
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return POLL_OP;
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}
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int mv_seq_exec(u32 serdes_num, u32 seq_id)
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{
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u32 seq_idx;
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struct op_params *seq_arr;
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u32 seq_size;
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u32 data_arr_idx;
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enum mv_op curr_op;
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DB(printf("\n### mv_seq_exec ###\n"));
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DB(printf("seq id: %d\n", seq_id));
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if (hws_is_serdes_active(serdes_num) != 1) {
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printf("mv_seq_exec_ext:Error: SerDes lane %d is not valid\n",
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serdes_num);
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return MV_BAD_PARAM;
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}
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seq_arr = serdes_seq_db[seq_id].op_params_ptr;
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seq_size = serdes_seq_db[seq_id].cfg_seq_size;
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data_arr_idx = serdes_seq_db[seq_id].data_arr_idx;
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DB(printf("seq_size: %d\n", seq_size));
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DB(printf("data_arr_idx: %d\n", data_arr_idx));
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/* Executing the sequence operations */
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for (seq_idx = 0; seq_idx < seq_size; seq_idx++) {
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curr_op = get_cfg_seq_op(&seq_arr[seq_idx]);
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op_execute_func_arr[curr_op](serdes_num, &seq_arr[seq_idx],
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data_arr_idx);
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}
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return MV_OK;
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}
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