mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 23:47:24 +00:00
6e33eba59f
Since 291da96b8e ("clk: Allow clock defaults to be set during re-reloc
state for SPL only") it has been impossible to set clock defaults before
relocation. This is annoying on boards without SPL, since there is no way
to set clock defaults before U-Boot proper. In particular, the aisram rate
must be changed before relocation on the K210, since U-Boot will hang if we
try and change the rate while we are using aisram.
To get around this, extend the stage parameter to allow force setting
defaults, even if they would be otherwise postponed for later. A device
tree property was decided against because of the concerns in the original
commit thread about the overhead of repeatedly parsing the device tree.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
863 lines
17 KiB
C
863 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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* Copyright (c) 2016, NVIDIA CORPORATION.
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* Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
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*/
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#include <common.h>
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#include <clk.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <dt-structs.h>
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#include <errno.h>
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#include <log.h>
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#include <malloc.h>
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#include <dm/device_compat.h>
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#include <dm/device-internal.h>
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#include <dm/devres.h>
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#include <dm/read.h>
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#include <linux/bug.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <asm/global_data.h>
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static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
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{
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return (const struct clk_ops *)dev->driver->ops;
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}
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struct clk *dev_get_clk_ptr(struct udevice *dev)
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{
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return (struct clk *)dev_get_uclass_priv(dev);
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}
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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# if CONFIG_IS_ENABLED(OF_PLATDATA)
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int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
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struct clk *clk)
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{
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int ret;
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ret = device_get_by_ofplat_idx(cells->idx, &clk->dev);
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if (ret)
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return ret;
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clk->id = cells->arg[0];
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return 0;
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}
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# else
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static int clk_of_xlate_default(struct clk *clk,
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struct ofnode_phandle_args *args)
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{
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debug("%s(clk=%p)\n", __func__, clk);
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if (args->args_count > 1) {
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debug("Invaild args_count: %d\n", args->args_count);
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return -EINVAL;
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}
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if (args->args_count)
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clk->id = args->args[0];
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else
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clk->id = 0;
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clk->data = 0;
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return 0;
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}
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static int clk_get_by_index_tail(int ret, ofnode node,
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struct ofnode_phandle_args *args,
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const char *list_name, int index,
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struct clk *clk)
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{
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struct udevice *dev_clk;
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const struct clk_ops *ops;
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assert(clk);
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clk->dev = NULL;
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if (ret)
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goto err;
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ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
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if (ret) {
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debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
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__func__, ret);
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return log_msg_ret("get", ret);
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}
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clk->dev = dev_clk;
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ops = clk_dev_ops(dev_clk);
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if (ops->of_xlate)
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ret = ops->of_xlate(clk, args);
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else
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ret = clk_of_xlate_default(clk, args);
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if (ret) {
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debug("of_xlate() failed: %d\n", ret);
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return log_msg_ret("xlate", ret);
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}
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return clk_request(dev_clk, clk);
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err:
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debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
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__func__, ofnode_get_name(node), list_name, index, ret);
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return log_msg_ret("prop", ret);
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}
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static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
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int index, struct clk *clk)
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{
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int ret;
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struct ofnode_phandle_args args;
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debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
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assert(clk);
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clk->dev = NULL;
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ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
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index, &args);
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if (ret) {
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debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
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__func__, ret);
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return log_ret(ret);
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}
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return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
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index, clk);
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}
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int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
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{
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struct ofnode_phandle_args args;
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int ret;
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ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
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index, &args);
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return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
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index, clk);
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}
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int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
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{
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struct ofnode_phandle_args args;
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int ret;
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ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
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index, &args);
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return clk_get_by_index_tail(ret, node, &args, "clocks",
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index, clk);
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}
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int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
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{
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int i, ret, err, count;
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bulk->count = 0;
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count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells", 0);
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if (count < 1)
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return count;
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bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
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if (!bulk->clks)
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return -ENOMEM;
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for (i = 0; i < count; i++) {
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ret = clk_get_by_index(dev, i, &bulk->clks[i]);
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if (ret < 0)
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goto bulk_get_err;
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++bulk->count;
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}
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return 0;
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bulk_get_err:
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err = clk_release_all(bulk->clks, bulk->count);
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if (err)
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debug("%s: could release all clocks for %p\n",
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__func__, dev);
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return ret;
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}
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static struct clk *clk_set_default_get_by_id(struct clk *clk)
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{
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struct clk *c = clk;
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if (CONFIG_IS_ENABLED(CLK_CCF)) {
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int ret = clk_get_by_id(clk->id, &c);
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if (ret) {
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debug("%s(): could not get parent clock pointer, id %lu\n",
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__func__, clk->id);
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ERR_PTR(ret);
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}
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}
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return c;
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}
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static int clk_set_default_parents(struct udevice *dev,
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enum clk_defaults_stage stage)
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{
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struct clk clk, parent_clk, *c, *p;
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int index;
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int num_parents;
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int ret;
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num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
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"#clock-cells", 0);
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if (num_parents < 0) {
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debug("%s: could not read assigned-clock-parents for %p\n",
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__func__, dev);
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return 0;
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}
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for (index = 0; index < num_parents; index++) {
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ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
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index, &parent_clk);
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/* If -ENOENT, this is a no-op entry */
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if (ret == -ENOENT)
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continue;
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if (ret) {
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debug("%s: could not get parent clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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return ret;
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}
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p = clk_set_default_get_by_id(&parent_clk);
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if (IS_ERR(p))
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return PTR_ERR(p);
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ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
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index, &clk);
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/*
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* If the clock provider is not ready yet, let it handle
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* the re-programming later.
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*/
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if (ret == -EPROBE_DEFER) {
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ret = 0;
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continue;
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}
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if (ret) {
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debug("%s: could not get assigned clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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return ret;
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}
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/* This is clk provider device trying to reparent itself
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* It cannot be done right now but need to wait after the
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* device is probed
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*/
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if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
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continue;
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if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
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/* do not setup twice the parent clocks */
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continue;
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c = clk_set_default_get_by_id(&clk);
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if (IS_ERR(c))
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return PTR_ERR(c);
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ret = clk_set_parent(c, p);
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/*
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* Not all drivers may support clock-reparenting (as of now).
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* Ignore errors due to this.
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*/
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if (ret == -ENOSYS)
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continue;
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if (ret < 0) {
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debug("%s: failed to reparent clock %d for %s\n",
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__func__, index, dev_read_name(dev));
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return ret;
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}
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}
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return 0;
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}
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static int clk_set_default_rates(struct udevice *dev,
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enum clk_defaults_stage stage)
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{
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struct clk clk, *c;
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int index;
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int num_rates;
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int size;
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int ret = 0;
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u32 *rates = NULL;
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size = dev_read_size(dev, "assigned-clock-rates");
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if (size < 0)
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return 0;
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num_rates = size / sizeof(u32);
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rates = calloc(num_rates, sizeof(u32));
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if (!rates)
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return -ENOMEM;
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ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
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if (ret)
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goto fail;
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for (index = 0; index < num_rates; index++) {
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/* If 0 is passed, this is a no-op */
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if (!rates[index])
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continue;
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ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
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index, &clk);
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/*
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* If the clock provider is not ready yet, let it handle
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* the re-programming later.
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*/
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if (ret == -EPROBE_DEFER) {
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ret = 0;
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continue;
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}
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if (ret) {
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dev_dbg(dev,
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"could not get assigned clock %d (err = %d)\n",
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index, ret);
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continue;
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}
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/* This is clk provider device trying to program itself
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* It cannot be done right now but need to wait after the
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* device is probed
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*/
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if (stage == CLK_DEFAULTS_PRE && clk.dev == dev)
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continue;
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if (stage != CLK_DEFAULTS_PRE && clk.dev != dev)
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/* do not setup twice the parent clocks */
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continue;
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c = clk_set_default_get_by_id(&clk);
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if (IS_ERR(c))
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return PTR_ERR(c);
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ret = clk_set_rate(c, rates[index]);
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if (ret < 0) {
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dev_warn(dev,
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"failed to set rate on clock index %d (%ld) (error = %d)\n",
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index, clk.id, ret);
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break;
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}
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}
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fail:
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free(rates);
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return ret;
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}
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int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage)
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{
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int ret;
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if (!dev_has_ofnode(dev))
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return 0;
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/*
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* To avoid setting defaults twice, don't set them before relocation.
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* However, still set them for SPL. And still set them if explicitly
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* asked.
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*/
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if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
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if (stage != CLK_DEFAULTS_POST_FORCE)
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return 0;
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debug("%s(%s)\n", __func__, dev_read_name(dev));
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ret = clk_set_default_parents(dev, stage);
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if (ret)
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return ret;
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ret = clk_set_default_rates(dev, stage);
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if (ret < 0)
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return ret;
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return 0;
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}
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int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
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{
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int index;
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debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
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clk->dev = NULL;
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index = dev_read_stringlist_search(dev, "clock-names", name);
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if (index < 0) {
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debug("fdt_stringlist_search() failed: %d\n", index);
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return index;
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}
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return clk_get_by_index(dev, index, clk);
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}
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# endif /* OF_PLATDATA */
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int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
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{
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int index;
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debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
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ofnode_get_name(node), name, clk);
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clk->dev = NULL;
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index = ofnode_stringlist_search(node, "clock-names", name);
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if (index < 0) {
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debug("fdt_stringlist_search() failed: %d\n", index);
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return index;
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}
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return clk_get_by_index_nodev(node, index, clk);
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}
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int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
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{
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int ret;
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ret = clk_get_by_name_nodev(node, name, clk);
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if (ret == -ENODATA)
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return 0;
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return ret;
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}
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int clk_release_all(struct clk *clk, int count)
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{
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int i, ret;
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for (i = 0; i < count; i++) {
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debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
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/* check if clock has been previously requested */
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if (!clk[i].dev)
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continue;
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ret = clk_disable(&clk[i]);
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if (ret && ret != -ENOSYS)
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return ret;
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ret = clk_free(&clk[i]);
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if (ret && ret != -ENOSYS)
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return ret;
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}
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return 0;
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}
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#endif /* OF_CONTROL */
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int clk_request(struct udevice *dev, struct clk *clk)
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{
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const struct clk_ops *ops;
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debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
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if (!clk)
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return 0;
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ops = clk_dev_ops(dev);
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clk->dev = dev;
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if (!ops->request)
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return 0;
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return ops->request(clk);
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}
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int clk_free(struct clk *clk)
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{
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const struct clk_ops *ops;
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debug("%s(clk=%p)\n", __func__, clk);
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if (!clk_valid(clk))
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return 0;
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ops = clk_dev_ops(clk->dev);
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if (!ops->rfree)
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return 0;
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return ops->rfree(clk);
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}
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ulong clk_get_rate(struct clk *clk)
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{
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const struct clk_ops *ops;
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int ret;
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debug("%s(clk=%p)\n", __func__, clk);
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if (!clk_valid(clk))
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return 0;
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ops = clk_dev_ops(clk->dev);
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if (!ops->get_rate)
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return -ENOSYS;
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ret = ops->get_rate(clk);
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if (ret)
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return log_ret(ret);
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return 0;
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}
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struct clk *clk_get_parent(struct clk *clk)
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{
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struct udevice *pdev;
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struct clk *pclk;
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debug("%s(clk=%p)\n", __func__, clk);
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if (!clk_valid(clk))
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return NULL;
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pdev = dev_get_parent(clk->dev);
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if (!pdev)
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return ERR_PTR(-ENODEV);
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pclk = dev_get_clk_ptr(pdev);
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if (!pclk)
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return ERR_PTR(-ENODEV);
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return pclk;
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}
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long long clk_get_parent_rate(struct clk *clk)
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{
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const struct clk_ops *ops;
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struct clk *pclk;
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debug("%s(clk=%p)\n", __func__, clk);
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if (!clk_valid(clk))
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return 0;
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pclk = clk_get_parent(clk);
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if (IS_ERR(pclk))
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return -ENODEV;
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ops = clk_dev_ops(pclk->dev);
|
|
if (!ops->get_rate)
|
|
return -ENOSYS;
|
|
|
|
/* Read the 'rate' if not already set or if proper flag set*/
|
|
if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
|
|
pclk->rate = clk_get_rate(pclk);
|
|
|
|
return pclk->rate;
|
|
}
|
|
|
|
ulong clk_round_rate(struct clk *clk, ulong rate)
|
|
{
|
|
const struct clk_ops *ops;
|
|
|
|
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
|
|
if (!clk_valid(clk))
|
|
return 0;
|
|
|
|
ops = clk_dev_ops(clk->dev);
|
|
if (!ops->round_rate)
|
|
return -ENOSYS;
|
|
|
|
return ops->round_rate(clk, rate);
|
|
}
|
|
|
|
static void clk_clean_rate_cache(struct clk *clk)
|
|
{
|
|
struct udevice *child_dev;
|
|
struct clk *clkp;
|
|
|
|
if (!clk)
|
|
return;
|
|
|
|
clk->rate = 0;
|
|
|
|
list_for_each_entry(child_dev, &clk->dev->child_head, sibling_node) {
|
|
clkp = dev_get_clk_ptr(child_dev);
|
|
clk_clean_rate_cache(clkp);
|
|
}
|
|
}
|
|
|
|
ulong clk_set_rate(struct clk *clk, ulong rate)
|
|
{
|
|
const struct clk_ops *ops;
|
|
|
|
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
|
|
if (!clk_valid(clk))
|
|
return 0;
|
|
ops = clk_dev_ops(clk->dev);
|
|
|
|
if (!ops->set_rate)
|
|
return -ENOSYS;
|
|
|
|
/* Clean up cached rates for us and all child clocks */
|
|
clk_clean_rate_cache(clk);
|
|
|
|
return ops->set_rate(clk, rate);
|
|
}
|
|
|
|
int clk_set_parent(struct clk *clk, struct clk *parent)
|
|
{
|
|
const struct clk_ops *ops;
|
|
int ret;
|
|
|
|
debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
|
|
if (!clk_valid(clk))
|
|
return 0;
|
|
ops = clk_dev_ops(clk->dev);
|
|
|
|
if (!ops->set_parent)
|
|
return -ENOSYS;
|
|
|
|
ret = ops->set_parent(clk, parent);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (CONFIG_IS_ENABLED(CLK_CCF))
|
|
ret = device_reparent(clk->dev, parent->dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int clk_enable(struct clk *clk)
|
|
{
|
|
const struct clk_ops *ops;
|
|
struct clk *clkp = NULL;
|
|
int ret;
|
|
|
|
debug("%s(clk=%p)\n", __func__, clk);
|
|
if (!clk_valid(clk))
|
|
return 0;
|
|
ops = clk_dev_ops(clk->dev);
|
|
|
|
if (CONFIG_IS_ENABLED(CLK_CCF)) {
|
|
/* Take id 0 as a non-valid clk, such as dummy */
|
|
if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
|
|
if (clkp->enable_count) {
|
|
clkp->enable_count++;
|
|
return 0;
|
|
}
|
|
if (clkp->dev->parent &&
|
|
device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
|
|
ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
|
|
if (ret) {
|
|
printf("Enable %s failed\n",
|
|
clkp->dev->parent->name);
|
|
return ret;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (ops->enable) {
|
|
ret = ops->enable(clk);
|
|
if (ret) {
|
|
printf("Enable %s failed\n", clk->dev->name);
|
|
return ret;
|
|
}
|
|
}
|
|
if (clkp)
|
|
clkp->enable_count++;
|
|
} else {
|
|
if (!ops->enable)
|
|
return -ENOSYS;
|
|
return ops->enable(clk);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int clk_enable_bulk(struct clk_bulk *bulk)
|
|
{
|
|
int i, ret;
|
|
|
|
for (i = 0; i < bulk->count; i++) {
|
|
ret = clk_enable(&bulk->clks[i]);
|
|
if (ret < 0 && ret != -ENOSYS)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int clk_disable(struct clk *clk)
|
|
{
|
|
const struct clk_ops *ops;
|
|
struct clk *clkp = NULL;
|
|
int ret;
|
|
|
|
debug("%s(clk=%p)\n", __func__, clk);
|
|
if (!clk_valid(clk))
|
|
return 0;
|
|
ops = clk_dev_ops(clk->dev);
|
|
|
|
if (CONFIG_IS_ENABLED(CLK_CCF)) {
|
|
if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
|
|
if (clkp->flags & CLK_IS_CRITICAL)
|
|
return 0;
|
|
|
|
if (clkp->enable_count == 0) {
|
|
printf("clk %s already disabled\n",
|
|
clkp->dev->name);
|
|
return 0;
|
|
}
|
|
|
|
if (--clkp->enable_count > 0)
|
|
return 0;
|
|
}
|
|
|
|
if (ops->disable) {
|
|
ret = ops->disable(clk);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
if (clkp && clkp->dev->parent &&
|
|
device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
|
|
ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
|
|
if (ret) {
|
|
printf("Disable %s failed\n",
|
|
clkp->dev->parent->name);
|
|
return ret;
|
|
}
|
|
}
|
|
} else {
|
|
if (!ops->disable)
|
|
return -ENOSYS;
|
|
|
|
return ops->disable(clk);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int clk_disable_bulk(struct clk_bulk *bulk)
|
|
{
|
|
int i, ret;
|
|
|
|
for (i = 0; i < bulk->count; i++) {
|
|
ret = clk_disable(&bulk->clks[i]);
|
|
if (ret < 0 && ret != -ENOSYS)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int clk_get_by_id(ulong id, struct clk **clkp)
|
|
{
|
|
struct udevice *dev;
|
|
struct uclass *uc;
|
|
int ret;
|
|
|
|
ret = uclass_get(UCLASS_CLK, &uc);
|
|
if (ret)
|
|
return ret;
|
|
|
|
uclass_foreach_dev(dev, uc) {
|
|
struct clk *clk = dev_get_clk_ptr(dev);
|
|
|
|
if (clk && clk->id == id) {
|
|
*clkp = clk;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
return -ENOENT;
|
|
}
|
|
|
|
bool clk_is_match(const struct clk *p, const struct clk *q)
|
|
{
|
|
/* trivial case: identical struct clk's or both NULL */
|
|
if (p == q)
|
|
return true;
|
|
|
|
/* trivial case #2: on the clk pointer is NULL */
|
|
if (!p || !q)
|
|
return false;
|
|
|
|
/* same device, id and data */
|
|
if (p->dev == q->dev && p->id == q->id && p->data == q->data)
|
|
return true;
|
|
|
|
return false;
|
|
}
|
|
|
|
static void devm_clk_release(struct udevice *dev, void *res)
|
|
{
|
|
clk_free(res);
|
|
}
|
|
|
|
static int devm_clk_match(struct udevice *dev, void *res, void *data)
|
|
{
|
|
return res == data;
|
|
}
|
|
|
|
struct clk *devm_clk_get(struct udevice *dev, const char *id)
|
|
{
|
|
int rc;
|
|
struct clk *clk;
|
|
|
|
clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
|
|
if (unlikely(!clk))
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
rc = clk_get_by_name(dev, id, clk);
|
|
if (rc)
|
|
return ERR_PTR(rc);
|
|
|
|
devres_add(dev, clk);
|
|
return clk;
|
|
}
|
|
|
|
struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
|
|
{
|
|
struct clk *clk = devm_clk_get(dev, id);
|
|
|
|
if (PTR_ERR(clk) == -ENODATA)
|
|
return NULL;
|
|
|
|
return clk;
|
|
}
|
|
|
|
void devm_clk_put(struct udevice *dev, struct clk *clk)
|
|
{
|
|
int rc;
|
|
|
|
if (!clk)
|
|
return;
|
|
|
|
rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
|
|
WARN_ON(rc);
|
|
}
|
|
|
|
int clk_uclass_post_probe(struct udevice *dev)
|
|
{
|
|
/*
|
|
* when a clock provider is probed. Call clk_set_defaults()
|
|
* also after the device is probed. This takes care of cases
|
|
* where the DT is used to setup default parents and rates
|
|
* using assigned-clocks
|
|
*/
|
|
clk_set_defaults(dev, CLK_DEFAULTS_POST);
|
|
|
|
return 0;
|
|
}
|
|
|
|
UCLASS_DRIVER(clk) = {
|
|
.id = UCLASS_CLK,
|
|
.name = "clk",
|
|
.post_probe = clk_uclass_post_probe,
|
|
};
|