mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-12 06:12:58 +00:00
8952b3857b
this patch adds support for PCIe3 (M.2 M key) and enables NVMe. => pci BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1d87 0x3588 Bridge device 0x04 01.00.00 0x10ec 0x8125 Network controller 0x00 02.00.00 0x1d87 0x3588 Bridge device 0x04 03.00.00 0x1179 0x011a Mass storage controller 0x08 => nvme scan => nvme info Device 0: Vendor: 0x1179 Rev: AGHA4101 Prod: 79CA20WPKRYN Type: Hard Disk Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512) Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
313 lines
5.7 KiB
Text
313 lines
5.7 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2023 Collabora Ltd.
|
|
*/
|
|
|
|
#include "rk3588-u-boot.dtsi"
|
|
#include <dt-bindings/pinctrl/rockchip.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/usb/pd.h>
|
|
|
|
/ {
|
|
chosen {
|
|
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
|
|
};
|
|
|
|
vcc12v_dcin: vcc12v-dcin-regulator {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc12v_dcin";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <12000000>;
|
|
regulator-max-microvolt = <12000000>;
|
|
};
|
|
|
|
vcc3v3_pcie30: vcc3v3-pcie30-regulator {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc3v3_pcie30";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
enable-active-high;
|
|
gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
|
|
startup-delay-us = <5000>;
|
|
vin-supply = <&vcc5v0_sys>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie3_vcc3v3_en>;
|
|
};
|
|
|
|
vcc5v0_usbdcin: vcc5v0-usbdcin {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc5v0_usbdcin";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
vin-supply = <&vcc12v_dcin>;
|
|
};
|
|
|
|
vcc5v0_usb: vcc5v0-usb {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc5v0_usb";
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
vin-supply = <&vcc5v0_usbdcin>;
|
|
};
|
|
|
|
vbus5v0_typec: vbus5v0-typec {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vbus5v0_typec";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&vcc5v0_usb>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&typec5v_pwren>;
|
|
};
|
|
};
|
|
|
|
&combphy0_ps {
|
|
status = "okay";
|
|
};
|
|
|
|
&fspim2_pins {
|
|
bootph-all;
|
|
};
|
|
|
|
&pcie2x1l2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie2x1l2_pins &pcie_reset_h>;
|
|
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie30phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie3x4 {
|
|
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie3_rst>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
pcie {
|
|
pcie_reset_h: pcie-reset-h {
|
|
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie2x1l2_pins: pcie2x1l2-pins {
|
|
rockchip,pins = <3 RK_PC7 4 &pcfg_pull_none>,
|
|
<3 RK_PD0 4 &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie3_rst: pcie3-rst {
|
|
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie3_vcc3v3_en: pcie3-vcc3v3-en {
|
|
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
usb-typec {
|
|
usbc0_int: usbc0-int {
|
|
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
typec5v_pwren: typec5v-pwren {
|
|
rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&sdhci {
|
|
cap-mmc-highspeed;
|
|
mmc-ddr-1_8v;
|
|
mmc-hs200-1_8v;
|
|
};
|
|
|
|
&sfc {
|
|
bootph-pre-ram;
|
|
u-boot,spl-sfc-no-dma;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&fspim2_pins>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
bootph-pre-ram;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <24000000>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-tx-bus-width = <1>;
|
|
};
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_otg {
|
|
rockchip,typec-vbus-det;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2phy2_grf {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2phy3_grf {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
companion = <&usb_host0_ohci>;
|
|
};
|
|
|
|
&usb_host1_ehci {
|
|
companion = <&usb_host1_ohci>;
|
|
};
|
|
|
|
&usbdp_phy0 {
|
|
orientation-switch;
|
|
svid = <0xff01>;
|
|
sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
|
|
sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
usbdp_phy0_orientation_switch: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&usbc0_orien_sw>;
|
|
};
|
|
|
|
usbdp_phy0_dp_altmode_mux: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&dp_altmode_mux>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&usbdp_phy0_u3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy1 {
|
|
rockchip,dp-lane-mux = <2 3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdp_phy1_u3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3_0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd3_1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbdrd_dwc3_0 {
|
|
usb-role-switch;
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
dwc3_0_role_switch: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&usbc0_role_sw>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
pinctrl-0 = <&i2c4m1_xfer>;
|
|
status = "okay";
|
|
|
|
usbc0: fusb302@22 {
|
|
compatible = "fcs,fusb302";
|
|
reg = <0x22>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&usbc0_int>;
|
|
vbus-supply = <&vbus5v0_typec>;
|
|
status = "okay";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
usbc0_role_sw: endpoint@0 {
|
|
remote-endpoint = <&dwc3_0_role_switch>;
|
|
};
|
|
};
|
|
};
|
|
|
|
usb_con: connector {
|
|
compatible = "usb-c-connector";
|
|
label = "USB-C";
|
|
data-role = "dual";
|
|
power-role = "dual";
|
|
try-power-role = "sink";
|
|
op-sink-microwatt = <1000000>;
|
|
sink-pdos =
|
|
<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
|
|
source-pdos =
|
|
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
|
|
|
altmodes {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
altmode@0 {
|
|
reg = <0>;
|
|
svid = <0xff01>;
|
|
vdo = <0xffffffff>;
|
|
};
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
usbc0_orien_sw: endpoint {
|
|
remote-endpoint = <&usbdp_phy0_orientation_switch>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dp_altmode_mux: endpoint {
|
|
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|