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LS1088A is compliant with the Layerscape Chassis Generation 3 with eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4 SDRAM memory controller with ECC, Data path acceleration architecture 2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs), QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Revised commit message] Reviewed-by: York Sun <york.sun@nxp.com> |
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| .. | ||
| doc | ||
| cpu.c | ||
| cpu.h | ||
| fdt.c | ||
| fsl_lsch2_serdes.c | ||
| fsl_lsch2_speed.c | ||
| fsl_lsch3_serdes.c | ||
| fsl_lsch3_speed.c | ||
| Kconfig | ||
| lowlevel.S | ||
| ls1012a_serdes.c | ||
| ls1043a_psci.S | ||
| ls1043a_serdes.c | ||
| ls1046a_serdes.c | ||
| ls1088a_serdes.c | ||
| ls2080a_serdes.c | ||
| Makefile | ||
| mp.c | ||
| ppa.c | ||
| soc.c | ||
| spl.c | ||