mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 11:13:07 +00:00
bebb8dfabc
Using SMC relocation microcode patch or USB-SOF microcode patch
will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
to 0x3000.
At the time being, init RAM is setup to use 0x2800-0x2e00, but
the stack pointer goes beyond 0x2800 and even beyond 0x2400.
For the time being we are not going to use any microcode patch
that uses memory about 0x3000, so reorganise setup to use:
- 0x2800 - 0x2e00 for init malloc and global data and CPM buffers
- 0x3000 - 0x3c00 for init stack
For more details about CPM dual port ram, see
commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (C) 2010-2017 CS Systemes d'Information
|
|
* Christophe Leroy <christophe.leroy@c-s.fr>
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
/* High Level Configuration Options */
|
|
|
|
/* Miscellaneous configurable options */
|
|
|
|
/* Definitions for initial stack pointer and data area (in DPRAM) */
|
|
#define CFG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800)
|
|
#define CFG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800)
|
|
#define CFG_SYS_INIT_SP (CONFIG_SYS_IMMR + 0x3c00)
|
|
|
|
/* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */
|
|
#define CFG_SYS_SDRAM_BASE 0x00000000
|
|
|
|
/* FLASH organization */
|
|
#define CFG_SYS_FLASH_BASE CONFIG_TEXT_BASE
|
|
|
|
/*
|
|
* For booting Linux, the board info and command line data
|
|
* have to be in the first 32 MB of memory, since this is
|
|
* the maximum mapped by the Linux kernel during initialization.
|
|
*/
|
|
#define CFG_SYS_BOOTMAPSZ (32 << 20)
|
|
|
|
/* Environment Configuration */
|
|
|
|
/* environment is in FLASH */
|
|
|
|
/* Ethernet configuration part */
|
|
|
|
/* NAND configuration part */
|
|
#define CFG_SYS_NAND_BASE 0x0C000000
|
|
|
|
#endif /* __CONFIG_H */
|