mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
6c869637fe
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
172 lines
5.1 KiB
C
172 lines
5.1 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91SAM9RLEK board.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define AT91_CPU_NAME "AT91SAM9RL"
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#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
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#define AT91_MASTER_CLOCK 100000000 /* peripheral */
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#define AT91_CPU_CLOCK 200000000 /* cpu */
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#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
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#define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/
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#define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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/*
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* Hardware drivers
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*/
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#define CONFIG_ATMEL_USART 1
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#undef CONFIG_USART0
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#undef CONFIG_USART1
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#undef CONFIG_USART2
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#define CONFIG_USART3 1 /* USART 3 is DBGU */
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/* LCD */
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#define CONFIG_LCD 1
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#define LCD_BPP LCD_COLOR8
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#define CONFIG_LCD_LOGO 1
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO 1
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#define CONFIG_LCD_INFO_BELOW_LOGO 1
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#define CONFIG_SYS_WHITE_ON_BLACK 1
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#define CONFIG_ATMEL_LCD 1
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#define CONFIG_ATMEL_LCD_RGB565 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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#define CONFIG_BOOTDELAY 3
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_AUTOSCRIPT
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_USB
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#define CONFIG_CMD_NAND 1
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x20000000
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#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
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/* DataFlash */
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#define CONFIG_HAS_DATAFLASH 1
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#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
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#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define AT91_SPI_CLK 15000000
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#define DATAFLASH_TCSS (0x1a << 16)
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#define DATAFLASH_TCHS (0x1 << 24)
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/* NOR flash - not present */
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#define CONFIG_SYS_NO_FLASH 1
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/* NAND flash */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_DBW_8 1
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/* Ethernet - not present */
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/* USB - not supported */
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_MEMTEST_END 0x23e00000
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#ifdef CONFIG_SYS_USE_DATAFLASH
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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#define CONFIG_ENV_IS_IN_DATAFLASH 1
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#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
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#define CONFIG_ENV_OFFSET 0x4200
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#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
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#define CONFIG_ENV_SIZE 0x4200
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#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock0 " \
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"mtdparts=at91_nand:-(root) "\
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"rw rootfstype=jffs2"
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#else /* CONFIG_SYS_USE_NANDFLASH */
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_IS_IN_NAND 1
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#define CONFIG_ENV_OFFSET 0x60000
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#define CONFIG_ENV_OFFSET_REDUND 0x80000
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#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock5 " \
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"mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
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"rw rootfstype=jffs2"
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP 1
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#define CONFIG_CMDLINE_EDITING 1
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#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
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#define CONFIG_STACKSIZE (32*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#error CONFIG_USE_IRQ not supported
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#endif
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#endif
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