mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-15 07:43:07 +00:00
f1d6fda6d3
Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that coreboot table definitions can be used by other x86 builds. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
124 lines
3 KiB
C
124 lines
3 KiB
C
/*
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* Copyright (c) 2011 The Chromium OS Authors.
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* (C) Copyright 2010,2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/e820.h>
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#include <asm/arch/sysinfo.h>
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DECLARE_GLOBAL_DATA_PTR;
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unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
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{
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unsigned num_entries;
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int i;
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num_entries = min((unsigned)lib_sysinfo.n_memranges, max_entries);
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if (num_entries < lib_sysinfo.n_memranges) {
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printf("Warning: Limiting e820 map to %d entries.\n",
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num_entries);
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}
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for (i = 0; i < num_entries; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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entries[i].addr = memrange->base;
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entries[i].size = memrange->size;
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/*
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* coreboot has some extensions (type 6 & 16) to the E820 types.
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* When we detect this, mark it as E820_RESERVED.
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*/
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if (memrange->type == CB_MEM_VENDOR_RSVD ||
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memrange->type == CB_MEM_TABLE)
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entries[i].type = E820_RESERVED;
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else
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entries[i].type = memrange->type;
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}
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return num_entries;
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}
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/*
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* This function looks for the highest region of memory lower than 4GB which
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* has enough space for U-Boot where U-Boot is aligned on a page boundary. It
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* overrides the default implementation found elsewhere which simply picks the
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* end of ram, wherever that may be. The location of the stack, the relocation
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* address, and how far U-Boot is moved by relocation are set in the global
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* data structure.
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*/
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ulong board_get_usable_ram_top(ulong total_size)
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{
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uintptr_t dest_addr = 0;
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int i;
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for (i = 0; i < lib_sysinfo.n_memranges; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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/* Force U-Boot to relocate to a page aligned address. */
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uint64_t start = roundup(memrange->base, 1 << 12);
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uint64_t end = memrange->base + memrange->size;
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/* Ignore non-memory regions. */
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if (memrange->type != CB_MEM_RAM)
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continue;
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/* Filter memory over 4GB. */
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if (end > 0xffffffffULL)
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end = 0x100000000ULL;
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/* Skip this region if it's too small. */
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if (end - start < total_size)
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continue;
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/* Use this address if it's the largest so far. */
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if (end > dest_addr)
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dest_addr = end;
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}
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/* If no suitable area was found, return an error. */
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if (!dest_addr)
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panic("No available memory found for relocation");
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return (ulong)dest_addr;
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}
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int dram_init(void)
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{
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int i;
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phys_size_t ram_size = 0;
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for (i = 0; i < lib_sysinfo.n_memranges; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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unsigned long long end = memrange->base + memrange->size;
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if (memrange->type == CB_MEM_RAM && end > ram_size)
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ram_size += memrange->size;
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}
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gd->ram_size = ram_size;
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if (ram_size == 0)
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return -1;
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return 0;
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}
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void dram_init_banksize(void)
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{
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int i, j;
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if (CONFIG_NR_DRAM_BANKS) {
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for (i = 0, j = 0; i < lib_sysinfo.n_memranges; i++) {
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struct memrange *memrange = &lib_sysinfo.memrange[i];
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if (memrange->type == CB_MEM_RAM) {
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gd->bd->bi_dram[j].start = memrange->base;
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gd->bd->bi_dram[j].size = memrange->size;
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j++;
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if (j >= CONFIG_NR_DRAM_BANKS)
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break;
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}
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}
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}
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}
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