Stefan Roese d0e932de7c arm: socfpga: Change watchdog timeout ... The current current watchdog timeout of 12 seconds is a bit small for booting into Linux, especially when using a NFS based rootfs. So lets change this timeout to a more defensive value of 30 seconds. Also we now call the hw_watchdog_init() function so that we override the value already configured from the Preloader. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>		2014-12-21 14:39:04 +01:00
..
clock_manager.c	arm: socfpga: Add DW master SPI clock to clock_manager.c	2014-11-07 16:09:10 +01:00
config.mk	socfpga: Fix SOCFPGA build error for Altera dev kit	2014-08-29 15:50:54 -04:00
fpga_manager.c	arm: socfpga: fpga: Add SoCFPGA FPGA programming interface	2014-10-06 17:46:50 +02:00
freeze_controller.c	socfpga: correctly increment freeze_controller_base address	2014-12-06 13:53:57 +01:00
lowlevel_init.S	arm: move exception handling out of start.S files	2014-05-15 16:24:53 +02:00
Makefile	arm: socfpga: fpga: Add SoCFPGA FPGA programming interface	2014-10-06 17:46:50 +02:00
misc.c	arm: socfpga: Change watchdog timeout	2014-12-21 14:39:04 +01:00
reset_manager.c	arm: socfpga: Use only one clrbits_le32 call to deassert SPI reset bits	2014-12-06 13:52:47 +01:00
scan_manager.c	socfpga: Adding Scan Manager driver	2014-07-05 00:27:27 +02:00
spl.c	arm: socfpga: clock: Clean up bit definitions	2014-10-06 17:46:49 +02:00
system_manager.c	arm: socfpga: sysmgr: Add FPGA bits into system manager	2014-10-06 17:46:50 +02:00
timer.c	arm: socfpga: timer: Pull the timer reload value from config file	2014-10-06 17:46:49 +02:00
u-boot-spl.lds	arm: socfpga: Zap spl.h and ad-hoc related syms	2014-10-27 02:26:24 +01:00