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338d9b032a
The clock ouput frequency is calculated incorrectly for AR8035 due to wrong masking of priv->clk_25m_reg and priv->clk_25m_mask. This same issue has been already fixed in the kernel by: commit b1f4c209d84057b6d40b939b6e4404854271d797 Author: Oleksij Rempel <o.rempel@pengutronix.de> Date: Wed Apr 1 11:57:32 2020 +0200 net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035 The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set for the values that comprise the fields, not zero-bits-set. This patch fixes the clock frequency configuration for ATH8030 and ATH8035 Atheros PHYs by removing the erroneous "~". To reproduce this bug, configure the PHY with the device tree binding "qca,clk-out-frequency" and remove the machine specific PHY fixups. Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net> Apply the same fix in the U-Boot driver. Tested on a i.MX6 Hummingboard. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Michael Walle <michael@walle.cc> Tested-by: Tom Rini <trini@konsulko.com> |
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aquantia.c | ||
atheros.c | ||
b53.c | ||
broadcom.c | ||
cortina.c | ||
davicom.c | ||
dp83867.c | ||
et1011c.c | ||
fixed.c | ||
generic_10g.c | ||
Kconfig | ||
lxt.c | ||
Makefile | ||
marvell.c | ||
meson-gxl.c | ||
micrel_ksz8xxx.c | ||
micrel_ksz90x1.c | ||
miiphybb.c | ||
mscc.c | ||
mv88e61xx.c | ||
mv88e6352.c | ||
natsemi.c | ||
ncsi.c | ||
phy.c | ||
realtek.c | ||
smsc.c | ||
teranetics.c | ||
vitesse.c | ||
xilinx_gmii2rgmii.c | ||
xilinx_phy.c |