mirror of
https://github.com/AsahiLinux/u-boot
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3655dd22a4
Add configuration file for mini u-boot configuration which runs on a smaller footprint from on chip memory(OCM). This configuration has required CONFIG's enabled to support octal spi flash and uses DCC terminal for console output. Add required dts for octal spi flash mini u-boot configuration. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20221116141155.14788-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
77 lines
1.5 KiB
Text
77 lines
1.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx Versal Mini OSPI Configuration
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*
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* (C) Copyright 2018-2019, Xilinx, Inc.
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*
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* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
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* Michal Simek <michal.simek@xilinx.com>
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*/
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/dts-v1/;
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/ {
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compatible = "xlnx,versal";
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#address-cells = <2>;
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#size-cells = <2>;
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model = "Xilinx Versal MINI OSPI";
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clk125: clk125 {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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clock-frequency = <125000000>;
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};
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dcc: dcc {
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compatible = "arm,dcc";
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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amba: amba {
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u-boot,dm-pre-reloc;
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compatible = "simple-bus";
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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ranges;
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ospi: spi@f1010000 {
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compatible = "cadence,qspi", "cdns,qspi-nor";
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status = "okay";
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reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>;
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clock-names = "ref_clk", "pclk";
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clocks = <&clk125 &clk125>;
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bus-num = <2>;
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num-cs = <1>;
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,is-dma = <1>;
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cdns,trigger-address = <0xc0000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash0: flash@0 {
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compatible = "n25q512a", "micron,m25p80",
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"jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <8>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <20000000>;
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};
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};
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};
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aliases {
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serial0 = &dcc;
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spi0 = &ospi;
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};
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chosen {
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stdout-path = "serial0:115200";
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};
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memory@fffc0000 {
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device_type = "memory";
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reg = <0x0 0xfffc0000 0x0 0x40000>;
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};
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};
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