u-boot/drivers/clk/sunxi
Andre Przywara 13b0867dc3 sunxi: clk: enable clk and reset for CCU devices
Some Allwinner clock devices have parent clocks and reset gates itself,
which need to be activated for them to work.

Add some code to just assert all resets and enable all clocks given.
This should enable the A80 MMC config clock, which requires both to be
activated. The full CCU devices typically don't require resets, and have
just fixed clocks as their parents. Since we treat both as optional and
enabling fixed clocks is a NOP, this works for all cases, without the need
to differentiate between those clock types.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2019-01-30 18:21:35 +05:30
..
clk_a10.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a10s.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a23.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a31.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a64.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_a80.c sunxi: clk: A80: add MMC clock support 2019-01-29 23:33:08 +05:30
clk_a83t.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_h3.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_h6.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_r40.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
clk_sunxi.c sunxi: clk: enable clk and reset for CCU devices 2019-01-30 18:21:35 +05:30
clk_v3s.c sunxi: clk: add MMC gates/resets 2019-01-29 23:30:11 +05:30
Kconfig clk: sunxi: Add Allwinner A80 CLK driver 2019-01-18 22:19:09 +05:30
Makefile clk: sunxi: Add Allwinner A80 CLK driver 2019-01-18 22:19:09 +05:30