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The N25Q256(A) datasheet clearly states that this device does have a Flag Status Register and does update FSR PEC bit 7 during Program and Erase cycles to indicate the cycle is in progress. Enable the FSR PEC bit polling on this device to prevent data corruption. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@openedev.com> Cc: Tom Rini <trini@konsulko.com> |
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.. | ||
fsl_espi_spl.c | ||
Kconfig | ||
Makefile | ||
sandbox.c | ||
sf-uclass.c | ||
sf.c | ||
sf_dataflash.c | ||
sf_internal.h | ||
sf_mtd.c | ||
sf_probe.c | ||
spi_flash.c | ||
spi_flash_ids.c |