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84b124db35
The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
24 lines
447 B
C
24 lines
447 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Intel Corporation <www.intel.com>
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*/
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#include <common.h>
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#include <cache.h>
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#include <dm.h>
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int cache_get_info(struct udevice *dev, struct cache_info *info)
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{
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struct cache_ops *ops = cache_get_ops(dev);
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if (!ops->get_info)
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return -ENOSYS;
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return ops->get_info(dev, info);
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}
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UCLASS_DRIVER(cache) = {
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.id = UCLASS_CACHE,
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.name = "cache",
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.post_bind = dm_scan_fdt_dev,
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};
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