mirror of
https://github.com/AsahiLinux/u-boot
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3a574cbe72
add support for the KS8695P (ARM 922 based) CPU * Patch by Steven Scholz, 19 May 2005: Add support for CONFIG_SERIAL_TAG on ARM boards
112 lines
2.6 KiB
C
112 lines
2.6 KiB
C
/*
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* (C) Copyright 2004-2005, Greg Ungerer <greg.ungerer@opengear.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/platform.h>
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/*
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* Handy KS8695 register access functions.
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*/
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#define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a)))
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#define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v)
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int timer_inited;
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ulong timer_ticks;
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int interrupt_init (void)
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{
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/* nothing happens here - we don't setup any IRQs */
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return (0);
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}
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/*
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* Initial timer set constants. Nothing complicated, just set for a 1ms
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* tick.
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*/
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#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1)
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#define TIMER_COUNT (TIMER_INTERVAL / 2)
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#define TIMER_PULSE TIMER_COUNT
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void reset_timer_masked(void)
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{
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/* Set the hadware timer for 1ms */
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ks8695_write(KS8695_TIMER1, TIMER_COUNT);
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ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
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ks8695_write(KS8695_TIMER_CTRL, 0x2);
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timer_ticks = 0;
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timer_inited++;
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}
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void reset_timer(void)
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{
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reset_timer_masked();
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}
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ulong get_timer_masked(void)
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{
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/* Check for timer wrap */
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if (ks8695_read(KS8695_INT_STATUS) & KS8695_INTMASK_TIMERINT1) {
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/* Clear interrupt condition */
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ks8695_write(KS8695_INT_STATUS, KS8695_INTMASK_TIMERINT1);
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timer_ticks++;
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}
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return timer_ticks;
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}
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ulong get_timer(ulong base)
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{
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return (get_timer_masked() - base);
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}
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void set_timer(ulong t)
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{
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timer_ticks = t;
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}
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void udelay(ulong usec)
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{
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ulong start = get_timer_masked();
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ulong end;
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if (!timer_inited)
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reset_timer();
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/* Only 1ms resolution :-( */
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end = usec / 1000;
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while (get_timer(start) < end)
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;
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}
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void reset_cpu (ulong ignored)
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{
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ulong tc;
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/* Set timer0 to watchdog, and let it timeout */
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tc = ks8695_read(KS8695_TIMER_CTRL) & 0x2;
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ks8695_write(KS8695_TIMER_CTRL, tc);
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ks8695_write(KS8695_TIMER0, ((10 << 8) | 0xff));
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ks8695_write(KS8695_TIMER_CTRL, (tc | 0x1));
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/* Should only wait here till watchdog resets */
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for (;;)
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;
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}
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