mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-06 05:04:26 +00:00
d491dc09e4
This commit removes the programming sequence that enables PLLE and UPHY PLL hardware power sequencers. Per TRM, boot software should enable PLLE and UPHY PLLs in software controlled power-on state and should power down PLL before jumping into kernel or the next stage boot software. Adds call to board_cleanup_before_linux to facilitate this. Signed-off-by: JC Kuo <jckuo@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
42 lines
706 B
C
42 lines
706 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*/
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#include <common.h>
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#include <errno.h>
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#include <asm/arch-tegra/xusb-padctl.h>
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struct tegra_xusb_phy * __weak tegra_xusb_phy_get(unsigned int type)
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{
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return NULL;
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}
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int __weak tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy)
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{
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return -ENOSYS;
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}
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int __weak tegra_xusb_phy_enable(struct tegra_xusb_phy *phy)
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{
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return -ENOSYS;
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}
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int __weak tegra_xusb_phy_disable(struct tegra_xusb_phy *phy)
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{
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return -ENOSYS;
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}
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int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy)
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{
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return -ENOSYS;
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}
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void __weak tegra_xusb_padctl_init(void)
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{
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}
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void __weak tegra_xusb_padctl_exit(void)
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{
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}
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