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1ca5017418
The commit132e5b6898
("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board") was not applied correctly and in full, and omitted an important split of the SoM into 3V3 and 1V8 options. The Avenger96 board is based on the 1V8 IO option of the DHCOR SoM, however this is an optional modification of the 3V3 IO DHCOR SoM with extra on-SoM regulator to cater for the 96boards 1V8 IO requirements. Reinstate the split between the 1V8 and 3V3 IO variants. Fixes:132e5b6898
("ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
24 lines
533 B
Text
24 lines
533 B
Text
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Copyright (C) 2020 Marek Vasut <marex@denx.de>
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*/
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#include "stm32mp15xx-dhcor-io3v3.dtsi"
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/ {
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/* Enpirion EP3A8LQI U2 on the 1V8 IO DHCOR */
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vdd_io: regulator-buck-io {
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compatible = "regulator-fixed";
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regulator-name = "buck-io";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vdd>;
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};
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};
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&pwr_regulators {
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vdd-supply = <&vdd_io>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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};
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