mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 09:30:10 +00:00
287 lines
11 KiB
C
287 lines
11 KiB
C
typedef unsigned char uint8;
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typedef unsigned short uint16;
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typedef unsigned int uint32;
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typedef volatile unsigned char vuint8;
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typedef volatile unsigned short vuint16;
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typedef volatile unsigned int vuint32;
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#define DPRAM_ATM CONFIG_SYS_IMMR + 0x3000
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#define ATM_DPRAM_BEGIN (DPRAM_ATM - CONFIG_SYS_IMMR - 0x2000)
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#define NUM_CONNECTIONS 1
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#define SAR_RXB_SIZE 1584
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#define AM_HMASK 0x0FFFFFF0
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#define NUM_CT_ENTRIES (NUM_CONNECTIONS)
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#define NUM_TCTE_ENTRIES (NUM_CONNECTIONS)
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#define NUM_AM_ENTRIES (NUM_CONNECTIONS+1)
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#define NUM_AP_ENTRIES (NUM_CONNECTIONS+1)
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#define NUM_MPHYPT_ENTRIES 1
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#define NUM_APCP_ENTRIES 1
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#define NUM_APCT_PRIO_1_ENTRIES 146 /* Determines minimum rate */
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#define NUM_TQ_ENTRIES 12
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#define SIZE_OF_CT_ENTRY 64
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#define SIZE_OF_TCTE_ENTRY 32
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#define SIZE_OF_AM_ENTRY 4
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#define SIZE_OF_AP_ENTRY 2
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#define SIZE_OF_MPHYPT_ENTRY 2
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#define SIZE_OF_APCP_ENTRY 32
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#define SIZE_OF_APCT_ENTRY 2
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#define SIZE_OF_TQ_ENTRY 2
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#define CT_BASE ((ATM_DPRAM_BEGIN + 63) & 0xFFC0) /*64 */
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#define TCTE_BASE (CT_BASE + NUM_CT_ENTRIES * SIZE_OF_CT_ENTRY) /*32 */
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#define APCP_BASE (TCTE_BASE + NUM_TCTE_ENTRIES * SIZE_OF_TCTE_ENTRY) /*32 */
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#define AM_BEGIN (APCP_BASE + NUM_APCP_ENTRIES * SIZE_OF_APCP_ENTRY) /*4 */
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#define AM_BASE (AM_BEGIN + (NUM_AM_ENTRIES - 1) * SIZE_OF_AM_ENTRY)
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#define AP_BEGIN (AM_BEGIN + NUM_AM_ENTRIES * SIZE_OF_AM_ENTRY) /*2 */
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#define AP_BASE (AP_BEGIN + (NUM_AP_ENTRIES - 1) * SIZE_OF_AP_ENTRY)
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#define MPHYPT_BASE (AP_BEGIN + NUM_AP_ENTRIES * SIZE_OF_AP_ENTRY) /*2 */
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#define APCT_PRIO_1_BASE (MPHYPT_BASE + NUM_MPHYPT_ENTRIES * SIZE_OF_MPHYPT_ENTRY) /*2 */
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#define TQ_BASE (APCT_PRIO_1_BASE + NUM_APCT_PRIO_1_ENTRIES * SIZE_OF_APCT_ENTRY) /*2 */
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#define ATM_DPRAM_SIZE ((TQ_BASE + NUM_TQ_ENTRIES * SIZE_OF_TQ_ENTRY) - ATM_DPRAM_BEGIN)
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#define CT_PTR(base) ((struct ct_entry_t *)((char *)(base) + 0x2000 + CT_BASE))
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#define TCTE_PTR(base) ((struct tcte_entry_t *)((char *)(base) + 0x2000 + TCTE_BASE))
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#define AM_PTR(base) ((uint32 *)((char *)(base) + 0x2000 + AM_BASE))
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#define AP_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + AP_BASE))
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#define MPHYPT_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + MPHYPT_BASE))
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#define APCP_PTR(base) ((struct apc_params_t *)((char*)(base) + 0x2000 + APCP_BASE))
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#define APCT1_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_1_BASE))
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#define APCT2_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_2_BASE))
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#define APCT3_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + APCT_PRIO_3_BASE))
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#define TQ_PTR(base) ((uint16 *)((char *)(base) + 0x2000 + TQ_BASE))
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/* SAR registers */
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#define RBDBASE(base) ((vuint32 *)(base + 0x3F00)) /* Base address of RxBD-List */
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#define SRFCR(base) ((vuint8 *)(base + 0x3F04)) /* DMA Receive function code */
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#define SRSTATE(base) ((vuint8 *)(base + 0x3F05)) /* DMA Receive status */
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#define MRBLR(base) ((vuint16 *)(base + 0x3F06)) /* Init to 0 for ATM */
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#define RSTATE(base) ((vuint32 *)(base + 0x3F08)) /* Do not write to */
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#define R_CNT(base) ((vuint16 *)(base + 0x3F10)) /* Do not write to */
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#define STFCR(base) ((vuint8 *)(base + 0x3F12)) /* DMA Transmit function code */
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#define STSTATE(base) ((vuint8 *)(base + 0x3F13)) /* DMA Transmit status */
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#define TBDBASE(base) ((vuint32 *)(base + 0x3F14)) /* Base address of TxBD-List */
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#define TSTATE(base) ((vuint32 *)(base + 0x3F18)) /* Do not write to */
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#define COMM_CH(base) ((vuint16 *)(base + 0x3F1C)) /* Command channel */
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#define STCHNUM(base) ((vuint16 *)(base + 0x3F1E)) /* Do not write to */
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#define T_CNT(base) ((vuint16 *)(base + 0x3F20)) /* Do not write to */
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#define CTBASE(base) ((vuint16 *)(base + 0x3F22)) /* Base address of Connection-table */
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#define ECTBASE(base) ((vuint32 *)(base + 0x3F24)) /* Valid only for external Conn.-table */
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#define INTBASE(base) ((vuint32 *)(base + 0x3F28)) /* Base address of Interrupt-table */
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#define INTPTR(base) ((vuint32 *)(base + 0x3F2C)) /* Pointer to Interrupt-queue */
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#define C_MASK(base) ((vuint32 *)(base + 0x3F30)) /* CRC-mask */
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#define SRCHNUM(base) ((vuint16 *)(base + 0x3F34)) /* Do not write to */
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#define INT_CNT(base) ((vuint16 *)(base + 0x3F36)) /* Interrupt-Counter */
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#define INT_ICNT(base) ((vuint16 *)(base + 0x3F38)) /* Interrupt threshold */
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#define TSTA(base) ((vuint16 *)(base + 0x3F3A)) /* Time-stamp-address */
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#define OLDLEN(base) ((vuint16 *)(base + 0x3F3C)) /* Do not write to */
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#define SMRBLR(base) ((vuint16 *)(base + 0x3F3E)) /* SAR max RXBuffer length */
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#define EHEAD(base) ((vuint32 *)(base + 0x3F40)) /* Valid for serial mode */
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#define EPAYLOAD(base) ((vuint32 *)(base + 0x3F44)) /* Valid for serial mode */
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#define TQBASE(base) ((vuint16 *)(base + 0x3F48)) /* Base address of Tx queue */
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#define TQEND(base) ((vuint16 *)(base + 0x3F4A)) /* End address of Tx queue */
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#define TQAPTR(base) ((vuint16 *)(base + 0x3F4C)) /* TQ APC pointer */
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#define TQTPTR(base) ((vuint16 *)(base + 0x3F4E)) /* TQ Tx pointer */
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#define APCST(base) ((vuint16 *)(base + 0x3F50)) /* APC status */
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#define APCPTR(base) ((vuint16 *)(base + 0x3F52)) /* APC parameter pointer */
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#define HMASK(base) ((vuint32 *)(base + 0x3F54)) /* Header mask */
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#define AMBASE(base) ((vuint16 *)(base + 0x3F58)) /* Address match table base */
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#define AMEND(base) ((vuint16 *)(base + 0x3F5A)) /* Address match table end */
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#define APBASE(base) ((vuint16 *)(base + 0x3F5C)) /* Address match parameter */
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#define FLBASE(base) ((vuint32 *)(base + 0x3F54)) /* First-level table base */
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#define SLBASE(base) ((vuint32 *)(base + 0x3F58)) /* Second-level table base */
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#define FLMASK(base) ((vuint16 *)(base + 0x3F5C)) /* First-level mask */
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#define ECSIZE(base) ((vuint16 *)(base + 0x3F5E)) /* Valid for extended mode */
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#define APCT_REAL(base) ((vuint32 *)(base + 0x3F60)) /* APC 32 bit counter */
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#define R_PTR(base) ((vuint32 *)(base + 0x3F64)) /* Do not write to */
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#define RTEMP(base) ((vuint32 *)(base + 0x3F68)) /* Do not write to */
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#define T_PTR(base) ((vuint32 *)(base + 0x3F6C)) /* Do not write to */
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#define TTEMP(base) ((vuint32 *)(base + 0x3F70)) /* Do not write to */
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/* ESAR registers */
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#define FMCTIMESTMP(base) ((vuint32 *)(base + 0x3F80)) /* Perf.Mon.Timestamp */
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#define FMCTEMPLATE(base) ((vuint32 *)(base + 0x3F84)) /* Perf.Mon.Template */
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#define PMPTR(base) ((vuint16 *)(base + 0x3F88)) /* Perf.Mon.Table */
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#define PMCHANNEL(base) ((vuint16 *)(base + 0x3F8A)) /* Perf.Mon.Channel */
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#define MPHYST(base) ((vuint16 *)(base + 0x3F90)) /* Multi-PHY Status */
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#define TCTEBASE(base) ((vuint16 *)(base + 0x3F92)) /* Internal TCT Extension Base */
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#define ETCTEBASE(base) ((vuint32 *)(base + 0x3F94)) /* External TCT Extension Base */
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#define COMM_CH2(base) ((vuint32 *)(base + 0x3F98)) /* 2nd command channel word */
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#define STATBASE(base) ((vuint16 *)(base + 0x3F9C)) /* Statistics table pointer */
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/* UTOPIA Mode Register */
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#define UTMODE(base) (CAST(vuint32 *)(base + 0x0978))
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/* SAR commands */
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#define TRANSMIT_CHANNEL_ACTIVATE_CMD 0x0FC1
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#define TRANSMIT_CHANNEL_DEACTIVATE_CMD 0x1FC1
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#define STOP_TRANSMIT_CMD 0x2FC1
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#define RESTART_TRANSMIT_CMD 0x3FC1
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#define STOP_RECEIVE_CMD 0x4FC1
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#define RESTART_RECEIVE_CMD 0x5FC1
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#define APC_BYPASS_CMD 0x6FC1
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#define MEM_WRITE_CMD 0x7FC1
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#define CPCR_FLG 0x0001
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/* INT flags */
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#define INT_VALID 0x80000000
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#define INT_WRAP 0x40000000
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#define INT_APCO 0x00800000
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#define INT_TQF 0x00200000
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#define INT_RXF 0x00080000
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#define INT_BSY 0x00040000
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#define INT_TXB 0x00020000
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#define INT_RXB 0x00010000
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#define NUM_INT_ENTRIES 80
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#define SIZE_OF_INT_ENTRY 4
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struct apc_params_t {
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vuint16 apct_base1; /* APC Table - First Priority Base pointer */
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vuint16 apct_end1; /* First APC Table - Length */
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vuint16 apct_ptr1; /* First APC Table Pointer */
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vuint16 apct_sptr1; /* APC Table First Priority Service pointer */
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vuint16 etqbase; /* Enhanced Transmit Queue Base pointer */
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vuint16 etqend; /* Enhanced Transmit Queue End pointer */
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vuint16 etqaptr; /* Enhanced Transmit Queue APC pointer */
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vuint16 etqtptr; /* Enhanced Transmit Queue Transmitter pointer */
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vuint16 apc_mi; /* APC - Max Iteration */
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vuint16 ncits; /* Number of Cells In TimeSlot */
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vuint16 apcnt; /* APC - N Timer */
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vuint16 reserved1; /* reserved */
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vuint16 eapcst; /* APC status */
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vuint16 ptp_counter; /* PTP queue length */
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vuint16 ptp_txch; /* PTP channel */
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vuint16 reserved2; /* reserved */
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};
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struct ct_entry_t {
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/* RCT */
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unsigned fhnt:1;
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unsigned pm_rct:1;
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unsigned reserved0:6;
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unsigned hec:1;
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unsigned clp:1;
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unsigned cng_ncrc:1;
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unsigned inf_rct:1;
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unsigned cngi_ptp:1;
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unsigned cdis_rct:1;
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unsigned aal_rct:2;
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uint16 rbalen;
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uint32 rcrc;
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uint32 rb_ptr;
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uint16 rtmlen;
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uint16 rbd_ptr;
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uint16 rbase;
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uint16 tstamp;
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uint16 imask;
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unsigned ft:2;
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unsigned nim:1;
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unsigned reserved1:2;
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unsigned rpmt:6;
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unsigned reserved2:5;
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uint8 reserved3[8];
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/* TCT */
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unsigned reserved4:1;
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unsigned pm_tct:1;
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unsigned reserved5:6;
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unsigned pc:1;
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unsigned reserved6:2;
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unsigned inf_tct:1;
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unsigned cr10:1;
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unsigned cdis_tct:1;
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unsigned aal_tct:2;
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uint16 tbalen;
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uint32 tcrc;
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uint32 tb_ptr;
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uint16 ttmlen;
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uint16 tbd_ptr;
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uint16 tbase;
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unsigned reserved7:5;
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unsigned tpmt:6;
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unsigned reserved8:3;
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unsigned avcf:1;
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unsigned act:1;
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uint32 chead;
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uint16 apcl;
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uint16 apcpr;
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unsigned out:1;
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unsigned bnr:1;
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unsigned tservice:2;
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unsigned apcp:12;
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uint16 apcpf;
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};
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struct tcte_entry_t {
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unsigned res1:4;
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unsigned scr:12;
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uint16 scrf;
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uint16 bt;
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uint16 buptrh;
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uint32 buptrl;
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unsigned vbr2:1;
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unsigned res2:15;
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uint16 oobr;
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uint16 res3[8];
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};
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#define SIZE_OF_RBD 12
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#define SIZE_OF_TBD 12
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struct atm_bd_t {
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vuint16 flags;
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vuint16 length;
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unsigned char *buffer_ptr;
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vuint16 cpcs_uu_cpi;
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vuint16 reserved;
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};
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/* BD flags */
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#define EMPTY 0x8000
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#define READY 0x8000
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#define WRAP 0x2000
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#define INTERRUPT 0x1000
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#define LAST 0x0800
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#define FIRST 0x0400
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#define OAM 0x0400
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#define CONTINUOUS 0x0200
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#define HEC_ERROR 0x0080
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#define CELL_LOSS 0x0040
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#define CONGESTION 0x0020
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#define ABORT 0x0010
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#define LEN_ERROR 0x0002
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#define CRC_ERROR 0x0001
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struct atm_connection_t {
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struct atm_bd_t *rbd_ptr;
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int num_rbd;
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struct atm_bd_t *tbd_ptr;
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int num_tbd;
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struct ct_entry_t *ct_ptr;
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struct tcte_entry_t *tcte_ptr;
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void *drv;
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void (*notify) (void *drv, int event);
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};
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struct atm_driver_t {
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int loaded;
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int started;
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char *csram;
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int csram_size;
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uint32 *am_top;
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uint16 *ap_top;
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uint32 *int_reload_ptr;
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uint32 *int_serv_ptr;
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struct atm_bd_t *rbd_base_ptr;
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struct atm_bd_t *tbd_base_ptr;
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unsigned linerate_in_bps;
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};
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extern struct atm_connection_t g_conn[NUM_CONNECTIONS];
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extern struct atm_driver_t g_atm;
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extern int atmLoad (void);
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extern void atmUnload (void);
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