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u-boot/cpu/mpc8xxx/ddr
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Kumar Gala 233fdd502a FSL DDR: Add DDR2 DIMM paramter support 
Compute DIMM parameters based upon the SPD information.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:00 +02:00
..
common_timing_params.h FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
ctrl_regs.c FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
ddr.h FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
ddr1_2_dimm_params.h FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
ddr1_dimm_params.c FSL DDR: Add DDR1 DIMM paramter support 2008-08-27 02:05:59 +02:00
ddr2_dimm_params.c FSL DDR: Add DDR2 DIMM paramter support 2008-08-27 02:06:00 +02:00
lc_common_dimm_params.c FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
main.c FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
Makefile FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
options.c FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
util.c FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00