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u-boot/board/altera
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Marek Vasut 29aa439759 arm: socfpga: Fix ArriaV SoCDK PLL config 
Pull out the ArriaV SoCDK clock config from ancient Altera U-Boot
"rel_socfpga_v2013.01.01_15.05.01_pr" and implant those values into
mainline to get a booting ArriaV SoCDK.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-23 11:56:21 +02:00
..
arria5-socdk arm: socfpga: Fix ArriaV SoCDK PLL config 2015-08-23 11:56:21 +02:00
common nios2: remove epled driver 2014-08-30 17:48:43 +08:00
cyclone5-socdk arm: socfpga: Fix MAINTAINERS entry for CV/AV SoCDK 2015-08-23 11:56:20 +02:00
nios2-generic kconfig: remove redundant "string" type in arch and board Kconfigs 2014-09-13 16:43:55 -04:00