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https://github.com/AsahiLinux/u-boot
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26e8ebcd7c
mpc8xx, mpc83xx and mpc86xx have similar watchdog with almost same memory registers. Refactor the driver to get the register addresses from the device tree and use the compatible to know the prescale factor. Calculate the watchdog setup value from the provided timeout. Don't declare it anymore as an HW_WATCHDOG, u-boot will start servicing the watchdog early enough. On mpc8xx the watchdog configuration register is also used for configuring the bus monitor. So add it as an option to the watchdog when it is mpc8xx. When watchdog is not selected, leave the configuration of the initial SYPCR from Kconfig. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
96 lines
1.7 KiB
Text
96 lines
1.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* CMPC885 Device Tree Source
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*
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* Copyright 2020 CS Group
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*
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*/
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/dts-v1/;
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/ {
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model = "CMPC885";
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compatible = "fsl, cmpc885", "fsl,mod885";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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stdout-path = &SERIAL;
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};
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SERIAL: serial {
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compatible = "fsl,pq1-smc";
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};
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FEC1: fec@0 {
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compatible = "fsl,pq1-fec1";
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};
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FEC2: fec@1 {
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compatible = "fsl,pq1-fec2";
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};
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soc: immr@ff000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device-type = "soc";
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compatible = "simple-bus";
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ranges = <0 0xff000000 0x4000>;
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reg = <0xff000000 0x00000200>;
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WDT: watchdog@0 {
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compatible = "fsl,pq1-wdt";
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reg = <0x0 0x10>;
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timeout-sec = <2>;
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hw_margin_ms = <1000>;
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};
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CPM1_PIO_B: gpio-controller@ab8 {
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#gpio-cells = <2>;
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compatible = "fsl,cpm1-pario-bank-b";
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reg = <0xab8 0x10>;
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gpio-controller;
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};
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CPM1_PIO_D: gpio-controller@970 {
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#gpio-cells = <2>;
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compatible = "fsl,cpm1-pario-bank-d";
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reg = <0x970 0x10>;
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gpio-controller;
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};
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CPM1_PIO_A: gpio-controller@950 {
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#gpio-cells = <2>;
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compatible = "fsl,cpm1-pario-bank-a";
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reg = <0x950 0x10>;
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gpio-controller;
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};
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CPM1_PIO_C: gpio-controller@960 {
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#gpio-cells = <2>;
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compatible = "fsl,cpm1-pario-bank-c";
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reg = <0x960 0x10>;
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gpio-controller;
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};
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CPM1_PIO_E: gpio-controller@ac8 {
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#gpio-cells = <2>;
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compatible = "fsl,cpm1-pario-bank-e";
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reg = <0xac8 0x18>;
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gpio-controller;
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};
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spi: spi@aa0 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <0>;
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compatible = "fsl,mpc8xx-spi";
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gpios = <&CPM1_PIO_B 21 1>; /* /EEPROM_CS ACTIVE_LOW */
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eeprom@0 {
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cell-index = <1>;
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};
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};
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};
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};
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