mirror of
https://github.com/AsahiLinux/u-boot
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d28baea078
There is an issue to recognize zynq or zynqmp image because header checking is just the same. That's why zynqmp images are recognized as zynq one. Check unused fields which are initialized to zero in zynq format (__reserved1 0x38 and __reserved2 0x44) which are initialized for zynqmp. This should ensure that images are properly recognized by: ./tools/mkimage -l spl/boot.bin Also show image type as ZynqMP instead of Zynq which is confusing. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Alexander Graf <agraf@suse.de>
304 lines
8.1 KiB
C
304 lines
8.1 KiB
C
/*
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* Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* The following Boot Header format/structures and values are defined in the
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* following documents:
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* * Xilinx Zynq-7000 Technical Reference Manual (Section 6.3)
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* * Xilinx Zynq-7000 Software Developers Guide (Appendix A.7 and A.8)
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*
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* Expected Header Size = 0x8C0
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* Forced as 'little' endian, 32-bit words
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*
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* 0x 0 - Interrupt Table (8 words)
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* ... (Default value = 0xeafffffe)
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* 0x 1f
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* 0x 20 - Width Detection
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* * DEFAULT_WIDTHDETECTION 0xaa995566
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* 0x 24 - Image Identifier
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* * DEFAULT_IMAGEIDENTIFIER 0x584c4e58
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* 0x 28 - Encryption
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* * 0x00000000 - None
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* * 0xa5c3c5a3 - eFuse
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* * 0x3a5c3c5a - bbRam
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* 0x 2C - User Field
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* 0x 30 - Image Offset
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* 0x 34 - Image Size
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* 0x 38 - Reserved (0x00000000) (according to spec)
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* * FSBL defines this field for Image Destination Address.
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* 0x 3C - Image Load
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* 0x 40 - Image Stored Size
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* 0x 44 - Reserved (0x00000000) (according to spec)
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* * FSBL defines this field for QSPI configuration Data.
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* 0x 48 - Checksum
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* 0x 4c - Unused (21 words)
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* ...
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* 0x 9c
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* 0x a0 - Register Initialization, 256 Address and Data word pairs
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* * List is terminated with an address of 0xffffffff or
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* ... * at the max number of entries
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* 0x89c
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* 0x8a0 - Unused (8 words)
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* ...
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* 0x8bf
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* 0x8c0 - Data/Image starts here or above
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*/
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#include "imagetool.h"
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#include "mkimage.h"
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#include <image.h>
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#define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe))
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#define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
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#define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
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#define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
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enum {
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ENCRYPTION_EFUSE = 0xa5c3c5a3,
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ENCRYPTION_BBRAM = 0x3a5c3c5a,
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ENCRYPTION_NONE = 0x0,
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};
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struct zynq_reginit {
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uint32_t address;
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uint32_t data;
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};
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#define HEADER_INTERRUPT_VECTORS 8
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#define HEADER_REGINITS 256
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struct zynq_header {
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uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */
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uint32_t width_detection; /* 0x20 */
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uint32_t image_identifier; /* 0x24 */
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uint32_t encryption; /* 0x28 */
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uint32_t user_field; /* 0x2c */
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uint32_t image_offset; /* 0x30 */
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uint32_t image_size; /* 0x34 */
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uint32_t __reserved1; /* 0x38 */
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uint32_t image_load; /* 0x3c */
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uint32_t image_stored_size; /* 0x40 */
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uint32_t __reserved2; /* 0x44 */
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uint32_t checksum; /* 0x48 */
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uint32_t __reserved3[21]; /* 0x4c */
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struct zynq_reginit register_init[HEADER_REGINITS]; /* 0xa0 */
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uint32_t __reserved4[8]; /* 0x8a0 */
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};
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static struct zynq_header zynqimage_header;
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static uint32_t zynqimage_checksum(struct zynq_header *ptr)
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{
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uint32_t checksum = 0;
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if (ptr == NULL)
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return 0;
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checksum += le32_to_cpu(ptr->width_detection);
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checksum += le32_to_cpu(ptr->image_identifier);
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checksum += le32_to_cpu(ptr->encryption);
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checksum += le32_to_cpu(ptr->user_field);
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checksum += le32_to_cpu(ptr->image_offset);
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checksum += le32_to_cpu(ptr->image_size);
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checksum += le32_to_cpu(ptr->__reserved1);
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checksum += le32_to_cpu(ptr->image_load);
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checksum += le32_to_cpu(ptr->image_stored_size);
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checksum += le32_to_cpu(ptr->__reserved2);
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checksum = ~checksum;
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return cpu_to_le32(checksum);
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}
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static void zynqimage_default_header(struct zynq_header *ptr)
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{
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int i;
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if (ptr == NULL)
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return;
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ptr->width_detection = HEADER_WIDTHDETECTION;
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ptr->image_identifier = HEADER_IMAGEIDENTIFIER;
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ptr->encryption = cpu_to_le32(ENCRYPTION_NONE);
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/* Setup not-supported/constant/reserved fields */
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for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++)
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ptr->interrupt_vectors[i] = HEADER_INTERRUPT_DEFAULT;
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for (i = 0; i < HEADER_REGINITS; i++) {
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ptr->register_init[i].address = HEADER_REGINIT_NULL;
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ptr->register_init[i].data = HEADER_REGINIT_NULL;
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}
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/*
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* Certain reserved fields are required to be set to 0, ensure they are
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* set as such.
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*/
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ptr->__reserved1 = 0x0;
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ptr->__reserved2 = 0x0;
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}
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/* mkimage glue functions */
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static int zynqimage_verify_header(unsigned char *ptr, int image_size,
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struct image_tool_params *params)
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{
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struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
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if (image_size < sizeof(struct zynq_header))
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return -1;
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if (zynqhdr->__reserved1 != 0)
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return -1;
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if (zynqhdr->__reserved2 != 0)
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return -1;
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if (zynqhdr->width_detection != HEADER_WIDTHDETECTION)
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return -1;
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if (zynqhdr->image_identifier != HEADER_IMAGEIDENTIFIER)
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return -1;
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if (zynqimage_checksum(zynqhdr) != zynqhdr->checksum)
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return -1;
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return 0;
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}
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static void zynqimage_print_header(const void *ptr)
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{
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struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
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int i;
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printf("Image Type : Xilinx Zynq Boot Image support\n");
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printf("Image Offset : 0x%08x\n", le32_to_cpu(zynqhdr->image_offset));
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printf("Image Size : %lu bytes (%lu bytes packed)\n",
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(unsigned long)le32_to_cpu(zynqhdr->image_size),
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(unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
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printf("Image Load : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
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printf("User Field : 0x%08x\n", le32_to_cpu(zynqhdr->user_field));
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printf("Checksum : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
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for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++) {
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if (zynqhdr->interrupt_vectors[i] == HEADER_INTERRUPT_DEFAULT)
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continue;
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printf("Modified Interrupt Vector Address [%d]: 0x%08x\n", i,
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le32_to_cpu(zynqhdr->interrupt_vectors[i]));
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}
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for (i = 0; i < HEADER_REGINITS; i++) {
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if (zynqhdr->register_init[i].address == HEADER_REGINIT_NULL)
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break;
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if (i == 0)
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printf("Custom Register Initialization:\n");
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printf(" @ 0x%08x -> 0x%08x\n",
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le32_to_cpu(zynqhdr->register_init[i].address),
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le32_to_cpu(zynqhdr->register_init[i].data));
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}
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}
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static int zynqimage_check_params(struct image_tool_params *params)
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{
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if (!params)
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return 0;
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if (params->addr != 0x0) {
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fprintf(stderr, "Error: Load Address cannot be specified.\n");
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return -1;
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}
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/*
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* If the entry point is specified ensure it is 64 byte aligned.
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*/
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if (params->eflag && (params->ep % 64 != 0)) {
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fprintf(stderr,
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"Error: Entry Point must be aligned to a 64-byte boundary.\n");
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return -1;
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}
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return !(params->lflag || params->dflag);
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}
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static int zynqimage_check_image_types(uint8_t type)
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{
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if (type == IH_TYPE_ZYNQIMAGE)
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return EXIT_SUCCESS;
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return EXIT_FAILURE;
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}
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static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
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const char *filename)
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{
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FILE *fp;
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struct zynq_reginit reginit;
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unsigned int reg_count = 0;
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int r, err;
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struct stat path_stat;
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/* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
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fp = fopen(filename, "r");
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if (!fp) {
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fprintf(stderr, "Cannot open initparams file: %s\n", filename);
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exit(1);
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}
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err = fstat(fileno(fp), &path_stat);
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if (err) {
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fclose(fp);
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return;
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}
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if (!S_ISREG(path_stat.st_mode)) {
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fclose(fp);
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return;
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}
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do {
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r = fscanf(fp, "%x %x", ®init.address, ®init.data);
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if (r == 2) {
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zynqhdr->register_init[reg_count] = reginit;
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++reg_count;
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}
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r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
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} while ((r != EOF) && (reg_count < HEADER_REGINITS));
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fclose(fp);
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}
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static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
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struct image_tool_params *params)
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{
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struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
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zynqimage_default_header(zynqhdr);
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/* place image directly after header */
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zynqhdr->image_offset =
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cpu_to_le32((uint32_t)sizeof(struct zynq_header));
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zynqhdr->image_size = cpu_to_le32((uint32_t)sbuf->st_size);
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zynqhdr->image_stored_size = zynqhdr->image_size;
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zynqhdr->image_load = 0x0;
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if (params->eflag)
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zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
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/* User can pass in text file with init list */
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if (strlen(params->imagename2))
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zynqimage_parse_initparams(zynqhdr, params->imagename2);
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zynqhdr->checksum = zynqimage_checksum(zynqhdr);
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}
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U_BOOT_IMAGE_TYPE(
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zynqimage,
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"Xilinx Zynq Boot Image support",
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sizeof(struct zynq_header),
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(void *)&zynqimage_header,
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zynqimage_check_params,
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zynqimage_verify_header,
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zynqimage_print_header,
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zynqimage_set_header,
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NULL,
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zynqimage_check_image_types,
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NULL,
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NULL
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);
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