mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-25 12:33:41 +00:00
f76750d111
This converts the following to Kconfig: CONFIG_CONS_INDEX CONFIG_DEBUG_UART_CLOCK CONFIG_FSL_TZPC_BP147 CONFIG_GENERIC_ATMEL_MCI CONFIG_IDENT_STRING CONFIG_LIBATA CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_LPC32XX_GPIO CONFIG_MP CONFIG_MPC8XXX_GPIO CONFIG_MTD_PARTITIONS CONFIG_MVGBE CONFIG_MXC_GPIO CONFIG_NR_DRAM_BANKS CONFIG_OF_BOARD_SETUP CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_OF_SYSTEM_SETUP CONFIG_PREBOOT CONFIG_ROCKCHIP_SERIAL CONFIG_RTC_ENABLE_32KHZ_OUTPUT CONFIG_RTC_MV CONFIG_SCSI_AHCI CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_SPEED CONFIG_SOFT_SPI CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_MACRONIX CONFIG_SPI_FLASH_MTD CONFIG_SPI_FLASH_SPANSION CONFIG_SPI_FLASH_SST CONFIG_SPI_FLASH_STMICRO CONFIG_SUPPORT_RAW_INITRD CONFIG_SYS_ARCH_TIMER CONFIG_SYS_BOARD CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE CONFIG_SYS_DCACHE_OFF CONFIG_SYS_FDT_SAVE_ADDRESS CONFIG_SYS_FLASH_CFI CONFIG_SYS_FSL_ERRATUM_ESDHC135 CONFIG_SYS_HAS_SERDES CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_LITTLE_ENDIAN CONFIG_SYS_LOAD_ADDR CONFIG_SYS_MMCSD_FS_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR CONFIG_SYS_NS16550 CONFIG_SYS_PLLFIN CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_TIMER_SYS_TICK_CH CONFIG_USB_EHCI_FSL CONFIG_U_QE CONFIG_VERSION_VARIABLE Signed-off-by: Tom Rini <trini@konsulko.com>
169 lines
4.4 KiB
C
169 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Samsung Electronics
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* Sanghee Kim <sh0130.kim@samsung.com>
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* Piotr Wilczek <p.wilczek@samsung.com>
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* Przemyslaw Marczak <p.marczak@samsung.com>
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*
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* Configuation settings for the Odroid-U3 (EXYNOS4412) board.
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*/
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#ifndef __CONFIG_ODROID_U3_H
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#define __CONFIG_ODROID_U3_H
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#include <configs/exynos4-common.h>
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#ifndef CONFIG_SYS_L2CACHE_OFF
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE 0x10502000
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#endif
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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/* Reserve the last 1 MiB for the secure firmware */
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#define CONFIG_SYS_MEM_TOP_HIDE (1UL << 20UL)
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#define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
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#include <linux/sizes.h>
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
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- GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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/* Partitions name */
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#define PARTS_BOOT "boot"
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#define PARTS_ROOT "platform"
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#define CONFIG_DFU_ALT \
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"uImage fat 0 1;" \
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"zImage fat 0 1;" \
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"Image.itb fat 0 1;" \
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"uInitrd fat 0 1;" \
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"exynos4412-odroidu3.dtb fat 0 1;" \
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"exynos4412-odroidx2.dtb fat 0 1;" \
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""PARTS_BOOT" part 0 1;" \
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""PARTS_ROOT" part 0 2\0" \
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#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K)
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#define CONFIG_DFU_ALT_BOOT_EMMC \
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"u-boot raw 0x3e 0x800 mmcpart 1;" \
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"bl1 raw 0x0 0x1e mmcpart 1;" \
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"bl2 raw 0x1e 0x1d mmcpart 1;" \
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"tzsw raw 0x83e 0x138 mmcpart 1\0"
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#define CONFIG_DFU_ALT_BOOT_SD \
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"u-boot raw 0x3f 0x800;" \
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"bl1 raw 0x1 0x1e;" \
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"bl2 raw 0x1f 0x1d;" \
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"tzsw raw 0x83f 0x138\0"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 2) \
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func(MMC, mmc, 0)
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#include <config_distro_bootcmd.h>
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/*
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* Bootable media layout:
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* dev: SD eMMC(part boot)
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* BL1 1 0
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* BL2 31 30
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* UBOOT 63 62
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* TZSW 2111 2110
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* ENV 2560 2560(part user)
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*
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* MBR Primary partiions:
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* Num Name Size Offset
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* 1. BOOT: 100MiB 2MiB
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* 2. ROOT: -
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadbootscript=load mmc ${mmcbootdev}:${mmcbootpart} ${scriptaddr} " \
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"boot.scr\0" \
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"loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kernel_addr_r} " \
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"${kernelname}\0" \
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"loadinitrd=load mmc ${mmcbootdev}:${mmcbootpart} ${ramdisk_addr_r} " \
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"${initrdname}\0" \
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"loaddtb=load mmc ${mmcbootdev}:${mmcbootpart} ${fdt_addr_r} " \
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"${fdtfile}\0" \
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"check_ramdisk=" \
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"if run loadinitrd; then " \
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"setenv initrd_addr ${ramdisk_addr_r};" \
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"else " \
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"setenv initrd_addr -;" \
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"fi;\0" \
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"check_dtb=" \
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"if run loaddtb; then " \
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"setenv fdt_addr ${fdt_addr_r};" \
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"else " \
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"setenv fdt_addr;" \
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"fi;\0" \
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"kernel_args=" \
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"setenv bootargs root=/dev/mmcblk${mmcrootdev}p${mmcrootpart}" \
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" rootwait ${console} ${opts}\0" \
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"boot_script=" \
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"run loadbootscript;" \
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"source ${scriptaddr}\0" \
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"boot_fit=" \
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"setenv kernelname Image.itb;" \
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"run loadkernel;" \
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"run kernel_args;" \
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"bootm ${kernel_addr_r}#${board_name}\0" \
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"boot_uimg=" \
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"setenv kernelname uImage;" \
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"run check_dtb;" \
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"run check_ramdisk;" \
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"run loadkernel;" \
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"run kernel_args;" \
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"bootm ${kernel_addr_r} ${initrd_addr} ${fdt_addr};\0" \
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"boot_zimg=" \
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"setenv kernelname zImage;" \
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"run check_dtb;" \
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"run check_ramdisk;" \
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"run loadkernel;" \
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"run kernel_args;" \
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"bootz ${kernel_addr_r} ${initrd_addr} ${fdt_addr};\0" \
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"autoboot=" \
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"if test -e mmc ${mmcbootdev} boot.scr; then; " \
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"run boot_script; " \
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"elif test -e mmc ${mmcbootdev} Image.itb; then; " \
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"run boot_fit;" \
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"elif test -e mmc ${mmcbootdev} zImage; then; " \
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"run boot_zimg;" \
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"elif test -e mmc ${mmcbootdev} uImage; then; " \
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"run boot_uimg;" \
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"fi;\0" \
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"console=console=ttySAC1,115200n8\0" \
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"mmcbootdev=0\0" \
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"mmcbootpart=1\0" \
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"mmcrootdev=0\0" \
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"mmcrootpart=2\0" \
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"dfu_alt_system="CONFIG_DFU_ALT \
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"dfu_alt_info=Please reset the board\0" \
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"consoleon=set console console=ttySAC1,115200n8; save; reset\0" \
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"consoleoff=set console console=ram; save; reset\0" \
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"initrdname=uInitrd\0" \
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"ramdisk_addr_r=0x42000000\0" \
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"scriptaddr=0x42000000\0" \
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"fdt_addr_r=0x40800000\0" \
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"kernel_addr_r=0x41000000\0" \
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BOOTENV
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/* GPT */
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/* Security subsystem - enable hw_rand() */
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#define CONFIG_EXYNOS_ACE_SHA
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/* USB */
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#define CONFIG_USB_EHCI_EXYNOS
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/*
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* Supported Odroid boards: X3, U3
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* TODO: Add Odroid X support
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*/
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#define CONFIG_MISC_COMMON
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#endif /* __CONFIG_H */
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