mirror of
https://github.com/AsahiLinux/u-boot
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c66f5620e6
This is control board on Bitmain Antminer S9. There are 3 board variables with 256MB, 512MB and 1024MB DDR. DDR memory is automatically detected with using get_with using get_ram_size(). Bitmain is using 16MB space for FPGA which is handled via reserved-memory. Also U-Boot is allocating 16B for storing bootcounts. Watchdog is started but never service in U-Boot. SPL MMC is working. SPL NAND is not working because it is not supported as of now. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
78 lines
1.1 KiB
Text
78 lines
1.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Bitmain Antminer S9 board DTS
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*
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* Copyright (C) 2018 Michal Simek
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* Copyright (C) 2018 VanguardiaSur
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*/
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/dts-v1/;
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#include "zynq-7000.dtsi"
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/ {
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model = "Bitmain Antminer S9 Board";
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compatible = "bitmain,antminer-s9", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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serial0 = &uart1;
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mmc0 = &sdhci0;
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gpio0 = &gpio0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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bootcount@efffff0 {
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reg = <0xefffff0 0x10>;
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no-map;
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};
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fpga_space@f000000 {
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reg = <0xf000000 0x1000000>;
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no-map;
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};
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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};
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&clkc {
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ps-clk-frequency = <33333333>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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/* 0362/5e62 */
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ethernet_phy: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&sdhci0 {
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u-boot,dm-pre-reloc;
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status = "okay";
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disable-wp;
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};
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&uart1 {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&watchdog0 {
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reset-on-timeout;
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timeout-sec = <200>;
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};
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