mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 10:18:38 +00:00
9a8996df05
The vdd_io regulator is present only on DHCOR SoM configured for 1V8 IO,
as populated on Avenger96, but not present on 3V3 DHCOR SoM. Move these
extras to Avenger96 u-boot DT extras.
Fixes: 3919aa1722 ("ARM: dts: stm32: Add DFU support for DHCOR recovery")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
107 lines
1.4 KiB
Text
107 lines
1.4 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
|
|
/*
|
|
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
|
|
*/
|
|
|
|
#include "stm32mp15xx-dhcor-u-boot.dtsi"
|
|
|
|
/ {
|
|
aliases {
|
|
mmc0 = &sdmmc1;
|
|
mmc1 = &sdmmc2;
|
|
usb0 = &usbotg_hs;
|
|
};
|
|
|
|
config {
|
|
u-boot,boot-led = "led1";
|
|
u-boot,error-led = "led4";
|
|
dh,board-coding-gpios = <&gpiog 13 0>, <&gpiod 9 0>;
|
|
};
|
|
};
|
|
|
|
|
|
ðernet0 {
|
|
phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
|
|
|
|
mdio0 {
|
|
ethernet-phy@7 {
|
|
reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
|
|
reset-assert-us = <11000>;
|
|
reset-deassert-us = <1000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&sdmmc1 {
|
|
u-boot,dm-spl;
|
|
st,use-ckin;
|
|
st,cmd-gpios = <&gpiod 2 0>;
|
|
st,ck-gpios = <&gpioc 12 0>;
|
|
st,ckin-gpios = <&gpioe 4 0>;
|
|
};
|
|
|
|
&sdmmc1_b4_pins_a {
|
|
u-boot,dm-spl;
|
|
pins1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
pins2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
};
|
|
|
|
&sdmmc1_dir_pins_b {
|
|
u-boot,dm-spl;
|
|
pins1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
pins2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
};
|
|
|
|
&sdmmc2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&sdmmc2_b4_pins_a {
|
|
u-boot,dm-spl;
|
|
pins1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
pins2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
};
|
|
|
|
&sdmmc2_d47_pins_c {
|
|
u-boot,dm-spl;
|
|
pins {
|
|
u-boot,dm-spl;
|
|
};
|
|
};
|
|
|
|
&uart4 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&uart4_pins_b {
|
|
u-boot,dm-pre-reloc;
|
|
pins1 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
pins2 {
|
|
u-boot,dm-pre-reloc;
|
|
/delete-property/ bias-disable;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
&usbotg_hs {
|
|
u-boot,force-b-session-valid;
|
|
hnp-srp-disable;
|
|
};
|
|
|
|
&vdd_io {
|
|
u-boot,dm-spl;
|
|
};
|