mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 14:10:43 +00:00
f40574e2d7
Move this in to Kconfig with a default of 115200. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [trini: Run moveconfig.py, reword commit slightly] Signed-off-by: Tom Rini <trini@konsulko.com>
221 lines
6.8 KiB
C
221 lines
6.8 KiB
C
/*
|
|
* Configuation settings for the Motorola MC5272C3 board.
|
|
*
|
|
* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
/*
|
|
* board/config.h - configuration options, board specific
|
|
*/
|
|
|
|
#ifndef _M5272C3_H
|
|
#define _M5272C3_H
|
|
|
|
/*
|
|
* High Level Configuration Options
|
|
* (easy to change)
|
|
*/
|
|
#define CONFIG_MCFTMR
|
|
|
|
#define CONFIG_MCFUART
|
|
#define CONFIG_SYS_UART_PORT (0)
|
|
|
|
#undef CONFIG_WATCHDOG
|
|
#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
|
|
|
|
#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
|
|
|
|
/* Configuration for environment
|
|
* Environment is embedded in u-boot in the second sector of the flash
|
|
*/
|
|
#ifndef CONFIG_MONITOR_IS_IN_RAM
|
|
#define CONFIG_ENV_OFFSET 0x4000
|
|
#define CONFIG_ENV_SECT_SIZE 0x2000
|
|
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
#else
|
|
#define CONFIG_ENV_ADDR 0xffe04000
|
|
#define CONFIG_ENV_SECT_SIZE 0x2000
|
|
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
#endif
|
|
|
|
#define LDS_BOARD_TEXT \
|
|
. = DEFINED(env_offset) ? env_offset : .; \
|
|
common/env_embedded.o (.text);
|
|
|
|
/*
|
|
* BOOTP options
|
|
*/
|
|
#define CONFIG_BOOTP_BOOTFILESIZE
|
|
#define CONFIG_BOOTP_BOOTPATH
|
|
#define CONFIG_BOOTP_GATEWAY
|
|
#define CONFIG_BOOTP_HOSTNAME
|
|
|
|
/*
|
|
* Command line configuration.
|
|
*/
|
|
|
|
#define CONFIG_MCFFEC
|
|
#ifdef CONFIG_MCFFEC
|
|
# define CONFIG_MII 1
|
|
# define CONFIG_MII_INIT 1
|
|
# define CONFIG_SYS_DISCOVER_PHY
|
|
# define CONFIG_SYS_RX_ETH_BUFFER 8
|
|
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
|
|
|
# define CONFIG_SYS_FEC0_PINMUX 0
|
|
# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
|
|
# define MCFFEC_TOUT_LOOP 50000
|
|
/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
|
|
# ifndef CONFIG_SYS_DISCOVER_PHY
|
|
# define FECDUPLEX FULL
|
|
# define FECSPEED _100BASET
|
|
# else
|
|
# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
|
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
|
|
# endif
|
|
# endif /* CONFIG_SYS_DISCOVER_PHY */
|
|
#endif
|
|
|
|
#ifdef CONFIG_MCFFEC
|
|
# define CONFIG_IPADDR 192.162.1.2
|
|
# define CONFIG_NETMASK 255.255.255.0
|
|
# define CONFIG_SERVERIP 192.162.1.1
|
|
# define CONFIG_GATEWAYIP 192.162.1.1
|
|
#endif /* CONFIG_MCFFEC */
|
|
|
|
#define CONFIG_HOSTNAME M5272C3
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
"netdev=eth0\0" \
|
|
"loadaddr=10000\0" \
|
|
"u-boot=u-boot.bin\0" \
|
|
"load=tftp ${loadaddr) ${u-boot}\0" \
|
|
"upd=run load; run prog\0" \
|
|
"prog=prot off ffe00000 ffe3ffff;" \
|
|
"era ffe00000 ffe3ffff;" \
|
|
"cp.b ${loadaddr} ffe00000 ${filesize};"\
|
|
"save\0" \
|
|
""
|
|
|
|
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
|
|
|
#if defined(CONFIG_CMD_KGDB)
|
|
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
|
#else
|
|
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
|
#endif
|
|
|
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
|
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
|
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
|
#define CONFIG_SYS_LOAD_ADDR 0x20000
|
|
#define CONFIG_SYS_MEMTEST_START 0x400
|
|
#define CONFIG_SYS_MEMTEST_END 0x380000
|
|
#define CONFIG_SYS_CLK 66000000
|
|
|
|
/*
|
|
* Low Level Configuration Settings
|
|
* (address mappings, register initial values, etc.)
|
|
* You should know what you are doing if you make changes here.
|
|
*/
|
|
#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
|
|
#define CONFIG_SYS_SCR 0x0003
|
|
#define CONFIG_SYS_SPR 0xffff
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Definitions for initial stack pointer and data area (in DPRAM)
|
|
*/
|
|
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
|
|
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
|
|
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
|
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Start addresses for the final memory configuration
|
|
* (Set up by the startup code)
|
|
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
|
|
*/
|
|
#define CONFIG_SYS_SDRAM_BASE 0x00000000
|
|
#define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */
|
|
#define CONFIG_SYS_FLASH_BASE 0xffe00000
|
|
|
|
#ifdef CONFIG_MONITOR_IS_IN_RAM
|
|
#define CONFIG_SYS_MONITOR_BASE 0x20000
|
|
#else
|
|
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
|
|
#endif
|
|
|
|
#define CONFIG_SYS_MONITOR_LEN 0x20000
|
|
#define CONFIG_SYS_MALLOC_LEN (256 << 10)
|
|
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
|
|
|
|
/*
|
|
* For booting Linux, the board info and command line data
|
|
* have to be in the first 8 MB of memory, since this is
|
|
* the maximum mapped by the Linux kernel during initialization ??
|
|
*/
|
|
#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
|
|
|
|
/*
|
|
* FLASH organization
|
|
*/
|
|
#define CONFIG_SYS_FLASH_CFI
|
|
#ifdef CONFIG_SYS_FLASH_CFI
|
|
# define CONFIG_FLASH_CFI_DRIVER 1
|
|
# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
|
|
# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
|
|
# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
|
# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
|
|
# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
|
|
#endif
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Cache Configuration
|
|
*/
|
|
#define CONFIG_SYS_CACHELINE_SIZE 16
|
|
|
|
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
|
|
CONFIG_SYS_INIT_RAM_SIZE - 8)
|
|
#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
|
|
CONFIG_SYS_INIT_RAM_SIZE - 4)
|
|
#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
|
|
#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
|
|
CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
|
|
CF_ACR_EN | CF_ACR_SM_ALL)
|
|
#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
|
|
CF_CACR_DISD | CF_CACR_INVI | \
|
|
CF_CACR_CEIB | CF_CACR_DCM | \
|
|
CF_CACR_EUSP)
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Memory bank definitions
|
|
*/
|
|
#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
|
|
#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
|
|
#define CONFIG_SYS_BR1_PRELIM 0
|
|
#define CONFIG_SYS_OR1_PRELIM 0
|
|
#define CONFIG_SYS_BR2_PRELIM 0x30000001
|
|
#define CONFIG_SYS_OR2_PRELIM 0xFFF80000
|
|
#define CONFIG_SYS_BR3_PRELIM 0
|
|
#define CONFIG_SYS_OR3_PRELIM 0
|
|
#define CONFIG_SYS_BR4_PRELIM 0
|
|
#define CONFIG_SYS_OR4_PRELIM 0
|
|
#define CONFIG_SYS_BR5_PRELIM 0
|
|
#define CONFIG_SYS_OR5_PRELIM 0
|
|
#define CONFIG_SYS_BR6_PRELIM 0
|
|
#define CONFIG_SYS_OR6_PRELIM 0
|
|
#define CONFIG_SYS_BR7_PRELIM 0x00000701
|
|
#define CONFIG_SYS_OR7_PRELIM 0xFFC0007C
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Port configuration
|
|
*/
|
|
#define CONFIG_SYS_PACNT 0x00000000
|
|
#define CONFIG_SYS_PADDR 0x0000
|
|
#define CONFIG_SYS_PADAT 0x0000
|
|
#define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */
|
|
#define CONFIG_SYS_PBDDR 0x0000
|
|
#define CONFIG_SYS_PBDAT 0x0000
|
|
#define CONFIG_SYS_PDCNT 0x00000000
|
|
#endif /* _M5272C3_H */
|