Fabio Estevam 67ee3dd35e mx53: Make PLL2 to be the parent of UART clock ... Change the parent UART clock to be PLL2, so that U-boot can also boot a Freescale 2.6.35 kernel for mx53. FSL kernel and U-boot changed the UART parent from PLL3 to PLL2 to avoid conflicts with IPU clocks, so that the video resolution can be changed without affecting the UART clock. On a 2.6.35 kernel the serial console is messed up after IPU driver is loaded and this patch fixes this problem. Tested on a mx53loco board booting a FSL kernel and also a mainline kernel. Reported-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>		2012-03-27 09:41:17 +02:00
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cpu	mx53: Make PLL2 to be the parent of UART clock	2012-03-27 09:41:17 +02:00
include/asm	mx6: Read silicon revision from register	2012-03-27 09:41:16 +02:00
lib	bootstage: arm: Add bootstage calls in board and bootm	2012-03-18 21:43:17 +01:00
config.mk	Reduce build times	2011-11-03 20:44:58 +01:00