mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-29 16:10:58 +00:00
ef50d6c06e
The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We also have SERDES init code for the 8536. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
73 lines
2.1 KiB
Makefile
73 lines
2.1 KiB
Makefile
#
|
|
# (C) Copyright 2006
|
|
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
#
|
|
# (C) Copyright 2002,2003 Motorola Inc.
|
|
# Xianghua Xiao,X.Xiao@motorola.com
|
|
#
|
|
# See file CREDITS for list of people who contributed to this
|
|
# project.
|
|
#
|
|
# This program is free software; you can redistribute it and/or
|
|
# modify it under the terms of the GNU General Public License as
|
|
# published by the Free Software Foundation; either version 2 of
|
|
# the License, or (at your option) any later version.
|
|
#
|
|
# This program is distributed in the hope that it will be useful,
|
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
# GNU General Public License for more details.
|
|
#
|
|
# You should have received a copy of the GNU General Public License
|
|
# along with this program; if not, write to the Free Software
|
|
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
# MA 02111-1307 USA
|
|
#
|
|
|
|
include $(TOPDIR)/config.mk
|
|
|
|
LIB = $(obj)lib$(CPU).a
|
|
|
|
START = start.o resetvec.o
|
|
SOBJS-$(CONFIG_MP) += release.o
|
|
SOBJS = $(SOBJS-y)
|
|
COBJS-$(CONFIG_MP) += mp.o
|
|
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
|
|
|
|
# supports ddr1
|
|
COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
|
|
COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
|
|
COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
|
|
COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
|
|
|
|
# supports ddr1/2
|
|
COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
|
|
COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
|
|
COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
|
|
|
|
# supports ddr1/2/3
|
|
COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
|
|
COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
|
|
|
|
COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
|
|
COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
|
|
pci.o serial_scc.o commproc.o ether_fcc.o qe_io.o \
|
|
$(COBJS-y)
|
|
|
|
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
|
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
|
START := $(addprefix $(obj),$(START))
|
|
|
|
all: $(obj).depend $(START) $(LIB)
|
|
|
|
$(LIB): $(OBJS)
|
|
$(AR) $(ARFLAGS) $@ $(OBJS)
|
|
|
|
#########################################################################
|
|
|
|
# defines $(obj).depend target
|
|
include $(SRCTREE)/rules.mk
|
|
|
|
sinclude $(obj).depend
|
|
|
|
#########################################################################
|