mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 18:28:55 +00:00
018e3fd2d1
Enable SPL for i.MX8QXP MEK, and currently use SPL FIT. The SPL enable SPL_DM to use MMC/PINCTRL/POWER DOMAIN/CLK. Note: SPL FIT could not support secure boot chain, because i.MX8/8X only support i.MX container format. This container format has not been upstreamed, so we use FIT for now. When SPL container supported, we could switch to that. Signed-off-by: Peng Fan <peng.fan@nxp.com>
183 lines
5.3 KiB
C
183 lines
5.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2018 NXP
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*/
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#ifndef __IMX8QXP_MEK_H
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#define __IMX8QXP_MEK_H
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#include <linux/sizes.h>
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#include <asm/arch/imx-regs.h>
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_TEXT_BASE 0x0
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#define CONFIG_SPL_MAX_SIZE (124 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
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#define CONFIG_SPL_STACK 0x013E000
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#define CONFIG_SPL_BSS_START_ADDR 0x00128000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
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#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_MALLOC_F_ADDR 0x00120000
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#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#define CONFIG_OF_EMBED
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#endif
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#define CONFIG_REMAKE_ELF
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#define CONFIG_BOARD_EARLY_INIT_F
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/* Flat Device Tree Definitions */
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#define CONFIG_OF_BOARD_SETUP
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#undef CONFIG_CMD_EXPORTENV
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#undef CONFIG_CMD_IMPORTENV
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_CRC32
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#undef CONFIG_BOOTM_NETBSD
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define USDHC1_BASE_ADDR 0x5B010000
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#define USDHC2_BASE_ADDR 0x5B020000
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=Image\0" \
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"panel=NULL\0" \
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"console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \
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"fdt_addr=0x83000000\0" \
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"fdt_high=0xffffffffffffffff\0" \
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"boot_fdt=try\0" \
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"fdt_file=fsl-imx8qxp-mek.dtb\0" \
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"initrd_addr=0x83800000\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
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"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"booti ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"else " \
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"echo wait for boot; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${loadaddr} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"booti ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"else " \
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"booti; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else booti ${loadaddr} - ${fdt_addr}; fi"
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/* Link Definitions */
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#define CONFIG_LOADADDR 0x80280000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
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/* Default environment is in SD */
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#define CONFIG_ENV_SIZE 0x1000
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#define CONFIG_ENV_OFFSET (64 * SZ_64K)
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
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#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
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#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define PHYS_SDRAM_1 0x80000000
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#define PHYS_SDRAM_2 0x880000000
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#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
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/* LPDDR4 board total DDR is 3GB */
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#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
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/* Serial */
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#define CONFIG_BAUDRATE 115200
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/* Monitor Command Prompt */
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#define CONFIG_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_CBSIZE 2048
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY 8000000 /* 8MHz */
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#ifndef CONFIG_DM_PCA953X
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#define CONFIG_PCA953X
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#define CONFIG_CMD_PCA953X
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#define CONFIG_CMD_PCA953X_INFO
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#endif
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/* Networking */
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define FEC_QUIRK_ENET_MAC
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#endif /* __IMX8QXP_MEK_H */
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