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u-boot/arch/arm/dts/sun50i-a64-amarula-relic.dts
Andre Przywara 7f53f5093b sunxi: dts: arm64: update devicetree files 
Update the devicetree files from the Linux kernel, version v6.0-rc4.
This is covering the 64-bit SoCs, from arch/arm64/boot/dts/allwinner.

This avoids the not backwards-compatible r_intc binding change, to allow
older kernels to boot, but the other nodes are updated.

Not much change here, the vast majority is actually cosmetic: node names
and using symbolic names for the the RTC clocks.
Some A64 boards gain some audio nodes.
The H616 DTs are now switched to the version finally merged into the
kernel, which brings some changes, but none affecting U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-18 08:15:59 +01:00

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Amarula Solutions B.V.
// Author: Jagan Teki <jagan@amarulasolutions.com>
/dts-v1/;
#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Amarula A64-Relic";
compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
i2c {
compatible = "i2c-gpio";
sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>;
i2c-gpio,delay-us = <5>;
#address-cells = <1>;
#size-cells = <0>;
ov5640: camera@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&csi_mclk_pin>;
clocks = <&ccu CLK_CSI_MCLK>;
clock-names = "xclk";
AVDD-supply = <&reg_aldo1>;
DOVDD-supply = <&reg_dldo3>;
DVDD-supply = <&reg_eldo3>;
reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* CSI-RST-R: PE14 */
powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* CSI-STBY-R: PE15 */
port {
ov5640_ep: endpoint {
remote-endpoint = <&csi_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
clock-names = "ext_clock";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&cpu1 {
cpu-supply = <&reg_dcdc2>;
};
&cpu2 {
cpu-supply = <&reg_dcdc2>;
};
&cpu3 {
cpu-supply = <&reg_dcdc2>;
};
&csi {
status = "okay";
port {
csi_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
bus-width = <8>;
hsync-active = <1>; /* Active high */
vsync-active = <0>; /* Active low */
data-active = <1>; /* Active high */
pclk-sample = <1>; /* Rising */
};
};
};
&ehci0 {
status = "okay";
};
&i2c0 {
status = "okay";
sensor@48 {
compatible = "st,stlm75";
reg = <0x48>;
};
};
&i2c0_pins {
bias-pull-up;
};
&i2c1 {
status = "okay";
touchscreen@5d {
compatible = "goodix,gt5663";
reg = <0x5d>;
AVDD28-supply = <&reg_ldo_io0>; /* VCC-CTP: GPIO0-LDO */
interrupt-parent = <&pio>;
interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* CTP-INT: PH4 */
reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* CTP-RST: PH8 */
touchscreen-inverted-x;
touchscreen-inverted-y;
};
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_dcdc1>;
/*
* Schematic shows both dldo4 and eldo1 connected for vcc-io-wifi, but
* dldo4 connection shows DNP(Do Not Populate) and eldo1 connected with
* 0Ohm register to vcc-io-wifi so eldo1 is used.
*/
vqmmc-supply = <&reg_eldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&r_rsb {
status = "okay";
axp803: pmic@3a3 {
compatible = "x-powers,axp803";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
};
};
#include "axp803.dtsi"
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "avdd-csi";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-pl";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1040000>;
regulator-max-microvolt = <1300000>;
regulator-name = "vdd-cpux";
};
/* DCDC3 is polyphased with DCDC2 */
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-hdmi-dsi-sensor";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-mipi";
};
&reg_dldo3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "dovdd-csi";
};
&reg_dldo4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&reg_eldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "cpvdd";
};
&reg_eldo3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dvdd-csi";
};
&reg_fldo1 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-1v2-hsic";
};
/*
* The A64 chip cannot work without this regulator off, although
* it seems to be only driving the AR100 core.
* Maybe we don't still know well about CPUs domain.
*/
&reg_fldo2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_ldo_io0 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc-ctp";
status = "okay";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
usb0_vbus-supply = <&reg_drivevbus>;
status = "okay";
};
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