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https://github.com/AsahiLinux/u-boot
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9539738509
Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <sjg@chromium.org>
232 lines
5.7 KiB
C
232 lines
5.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Interrupt Timer Subsystem
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*
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* Copyright (C) 2017 Intel Corporation.
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* Copyright (C) 2017 Siemens AG
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* Copyright 2019 Google LLC
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*
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* Taken from coreboot itss.c
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*/
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#include <common.h>
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#include <dm.h>
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#include <dt-structs.h>
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#include <irq.h>
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#include <log.h>
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#include <malloc.h>
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#include <p2sb.h>
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#include <spl.h>
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#include <asm/global_data.h>
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#include <asm/itss.h>
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static int set_polarity(struct udevice *dev, uint irq, bool active_low)
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{
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u32 mask;
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uint reg;
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if (irq > ITSS_MAX_IRQ)
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return -EINVAL;
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reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * (irq / IRQS_PER_IPC);
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mask = 1 << (irq % IRQS_PER_IPC);
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pcr_clrsetbits32(dev, reg, mask, active_low ? mask : 0);
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return 0;
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}
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#ifndef CONFIG_TPL_BUILD
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static int snapshot_polarities(struct udevice *dev)
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{
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struct itss_priv *priv = dev_get_priv(dev);
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const int start = GPIO_IRQ_START;
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const int end = GPIO_IRQ_END;
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int reg_start;
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int reg_end;
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int i;
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reg_start = start / IRQS_PER_IPC;
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reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC);
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log_debug("ITSS IRQ Polarities snapshot %p\n", priv->irq_snapshot);
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for (i = reg_start; i < reg_end; i++) {
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uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
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priv->irq_snapshot[i] = pcr_read32(dev, reg);
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log_debug(" - %d, reg %x: irq_snapshot[i] %x\n", i, reg,
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priv->irq_snapshot[i]);
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}
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/* Save the snapshot for use after relocation */
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gd->start_addr_sp -= sizeof(*priv);
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gd->start_addr_sp &= ~0xf;
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gd->arch.itss_priv = (void *)gd->start_addr_sp;
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memcpy(gd->arch.itss_priv, priv, sizeof(*priv));
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return 0;
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}
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static void show_polarities(struct udevice *dev, const char *msg)
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{
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int i;
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log_debug("ITSS IRQ Polarities %s:\n", msg);
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for (i = 0; i < NUM_IPC_REGS; i++) {
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uint reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
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log_debug("IPC%d: 0x%08x\n", i, pcr_read32(dev, reg));
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}
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}
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static int restore_polarities(struct udevice *dev)
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{
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struct itss_priv *priv = dev_get_priv(dev);
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struct itss_priv *old_priv;
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const int start = GPIO_IRQ_START;
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const int end = GPIO_IRQ_END;
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int reg_start;
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int reg_end;
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int i;
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/* Get the snapshot which was stored by the pre-reloc device */
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old_priv = gd->arch.itss_priv;
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if (!old_priv)
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return log_msg_ret("priv", -EFAULT);
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memcpy(priv->irq_snapshot, old_priv->irq_snapshot,
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sizeof(priv->irq_snapshot));
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show_polarities(dev, "Before");
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log_debug("priv->irq_snapshot %p\n", priv->irq_snapshot);
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reg_start = start / IRQS_PER_IPC;
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reg_end = DIV_ROUND_UP(end, IRQS_PER_IPC);
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for (i = reg_start; i < reg_end; i++) {
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u32 mask;
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u16 reg;
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int irq_start;
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int irq_end;
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irq_start = i * IRQS_PER_IPC;
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irq_end = min(irq_start + IRQS_PER_IPC - 1, ITSS_MAX_IRQ);
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if (start > irq_end)
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continue;
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if (end < irq_start)
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break;
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/* Track bits within the bounds of of the register */
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irq_start = max(start, irq_start) % IRQS_PER_IPC;
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irq_end = min(end, irq_end) % IRQS_PER_IPC;
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/* Create bitmask of the inclusive range of start and end */
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mask = (((1U << irq_end) - 1) | (1U << irq_end));
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mask &= ~((1U << irq_start) - 1);
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reg = PCR_ITSS_IPC0_CONF + sizeof(u32) * i;
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log_debug(" - %d, reg %x: mask %x, irq_snapshot[i] %x\n",
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i, reg, mask, priv->irq_snapshot[i]);
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pcr_clrsetbits32(dev, reg, mask, mask & priv->irq_snapshot[i]);
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}
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show_polarities(dev, "After");
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return 0;
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}
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#endif
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static int route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num)
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{
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struct itss_priv *priv = dev_get_priv(dev);
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struct pmc_route *route;
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int i;
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for (i = 0, route = priv->route; i < priv->route_count; i++, route++) {
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if (pmc_gpe_num == route->pmc)
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return route->gpio;
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}
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return -ENOENT;
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}
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static int itss_bind(struct udevice *dev)
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{
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/* This is not set with basic of-platdata, so set it manually */
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if (CONFIG_IS_ENABLED(OF_PLATDATA) &&
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!CONFIG_IS_ENABLED(OF_PLATDATA_INST))
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dev->driver_data = X86_IRQT_ITSS;
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return 0;
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}
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static int itss_of_to_plat(struct udevice *dev)
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{
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struct itss_priv *priv = dev_get_priv(dev);
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int ret;
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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struct itss_plat *plat = dev_get_plat(dev);
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struct dtd_intel_itss *dtplat = &plat->dtplat;
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/*
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* It would be nice to do this in the bind() method, but with
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* of-platdata binding happens in the order that DM finds things in the
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* linker list (i.e. alphabetical order by driver name). So the GPIO
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* device may well be bound before its parent (p2sb), and this call
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* will fail if p2sb is not bound yet.
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*
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* TODO(sjg@chromium.org): Add a parent pointer to child devices in dtoc
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*/
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ret = p2sb_set_port_id(dev, dtplat->intel_p2sb_port_id);
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if (ret)
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return log_msg_ret("Could not set port id", ret);
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priv->route = (struct pmc_route *)dtplat->intel_pmc_routes;
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priv->route_count = ARRAY_SIZE(dtplat->intel_pmc_routes) /
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sizeof(struct pmc_route);
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#else
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int size;
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size = dev_read_size(dev, "intel,pmc-routes");
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if (size < 0)
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return size;
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priv->route = malloc(size);
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if (!priv->route)
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return -ENOMEM;
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ret = dev_read_u32_array(dev, "intel,pmc-routes", (u32 *)priv->route,
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size / sizeof(fdt32_t));
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if (ret)
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return log_msg_ret("Cannot read pmc-routes", ret);
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priv->route_count = size / sizeof(struct pmc_route);
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#endif
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return 0;
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}
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static const struct irq_ops itss_ops = {
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.route_pmc_gpio_gpe = route_pmc_gpio_gpe,
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.set_polarity = set_polarity,
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#ifndef CONFIG_TPL_BUILD
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.snapshot_polarities = snapshot_polarities,
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.restore_polarities = restore_polarities,
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#endif
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};
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#if CONFIG_IS_ENABLED(OF_REAL)
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static const struct udevice_id itss_ids[] = {
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{ .compatible = "intel,itss", .data = X86_IRQT_ITSS },
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{ }
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};
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#endif
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U_BOOT_DRIVER(intel_itss) = {
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.name = "intel_itss",
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.id = UCLASS_IRQ,
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.of_match = of_match_ptr(itss_ids),
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.ops = &itss_ops,
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.bind = itss_bind,
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.of_to_plat = itss_of_to_plat,
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.plat_auto = sizeof(struct itss_plat),
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.priv_auto = sizeof(struct itss_priv),
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};
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