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Xilinx LocalLink Tri-Mode Ether MAC driver can be used by Xilinx Microblaze or Xilinx ppc405/440 in SDMA and FIFO mode. DCR or XPS bus can be used. The driver uses and requires MII and PHYLIB. CP: 4 warnings: 'Use of volatile is usually wrong' I won't fix this, because it depends on the network driver subsystem. Reported-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Stephan Linz <linz@li-pro.net>
143 lines
3.8 KiB
C
143 lines
3.8 KiB
C
/*
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* Xilinx xps_ll_temac ethernet driver for u-boot
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*
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* FIFO sub-controller
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*
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* Copyright (C) 2011 - 2012 Stephan Linz <linz@li-pro.net>
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* Copyright (C) 2008 - 2011 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2008 - 2011 PetaLogix
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*
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* Based on Yoshio Kashiwagi kashiwagi@co-nss.co.jp driver
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* Copyright (C) 2008 Nissin Systems Co.,Ltd.
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* March 2008 created
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*
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* CREDITS: tsec driver
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* [0]: http://www.xilinx.com/support/documentation
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*
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* [F]: [0]/ip_documentation/xps_ll_fifo.pdf
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* [S]: [0]/ip_documentation/xps_ll_temac.pdf
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* [A]: [0]/application_notes/xapp1041.pdf
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*/
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#include <config.h>
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#include <common.h>
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#include <net.h>
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#include <asm/types.h>
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#include <asm/io.h>
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#include "xilinx_ll_temac.h"
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#include "xilinx_ll_temac_fifo.h"
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int ll_temac_reset_fifo(struct eth_device *dev)
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{
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struct ll_temac *ll_temac = dev->priv;
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struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr;
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out_be32(&fifo_ctrl->tdfr, LL_FIFO_TDFR_KEY);
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out_be32(&fifo_ctrl->rdfr, LL_FIFO_RDFR_KEY);
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out_be32(&fifo_ctrl->isr, ~0UL);
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out_be32(&fifo_ctrl->ier, 0);
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return 0;
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}
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int ll_temac_recv_fifo(struct eth_device *dev)
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{
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int i, length = 0;
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u32 *buf = (u32 *)NetRxPackets[0];
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struct ll_temac *ll_temac = dev->priv;
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struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr;
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if (in_be32(&fifo_ctrl->isr) & LL_FIFO_ISR_RC) {
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/* reset isr */
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out_be32(&fifo_ctrl->isr, ~0UL);
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/*
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* MAYBE here:
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* while (fifo_ctrl->isr);
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*/
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/*
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* The length is written (into RLR) by the XPS LL FIFO
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* when the packet is received across the RX LocalLink
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* interface and the receive data FIFO had enough
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* locations that all of the packet data has been saved.
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* The RLR should only be read when a receive packet is
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* available for processing (the receive occupancy is
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* not zero). Once the RLR is read, the receive packet
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* data should be read from the receive data FIFO before
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* the RLR is read again.
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*
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* [F] page 17, Receive Length Register (RLR)
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*/
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if (in_be32(&fifo_ctrl->rdfo) & LL_FIFO_RDFO_MASK) {
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length = in_be32(&fifo_ctrl->rlf) & LL_FIFO_RLF_MASK;
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} else {
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printf("%s: Got error, no receive occupancy\n",
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__func__);
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return -1;
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}
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if (length > PKTSIZE_ALIGN) {
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printf("%s: Got error, receive package too big (%i)\n",
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__func__, length);
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ll_temac_reset_fifo(dev);
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return -1;
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}
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for (i = 0; i < length; i += 4)
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*buf++ = in_be32(&fifo_ctrl->rdfd);
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NetReceive(NetRxPackets[0], length);
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}
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return 0;
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}
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int ll_temac_send_fifo(struct eth_device *dev, volatile void *packet,
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int length)
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{
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int i;
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u32 *buf = (u32 *)packet;
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struct ll_temac *ll_temac = dev->priv;
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struct fifo_ctrl *fifo_ctrl = (void *)ll_temac->ctrladdr;
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if (length < LL_FIFO_TLF_MIN) {
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printf("%s: Got error, transmit package too small (%i)\n",
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__func__, length);
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return -1;
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}
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if (length > LL_FIFO_TLF_MAX) {
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printf("%s: Got error, transmit package too big (%i)\n",
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__func__, length);
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return -1;
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}
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for (i = 0; i < length; i += 4)
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out_be32(&fifo_ctrl->tdfd, *buf++);
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/*
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* Once the packet length is written to the TLR it is
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* automatically moved to the transmit data FIFO with
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* the packet data freeing up the TLR for another value.
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* The packet length must be written to the TLR after
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* the packet data is written to the transmit data FIFO.
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* It is not valid to write data for multiple packets
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* to the transmit data FIFO before writing the packet
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* length values.
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*
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* [F] page 17, Transmit Length Register (TLR)
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*/
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out_be32(&fifo_ctrl->tlf, length);
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return 0;
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}
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