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https://github.com/AsahiLinux/u-boot
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62 lines
1.6 KiB
C
62 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2003
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* Texas Instruments <www.ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002-2004
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* (C) Copyright 2004
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* Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
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*/
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#include <common.h>
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#define TIMER_ENABLE (1 << 7)
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#define TIMER_MODE_MSK (1 << 6)
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#define TIMER_MODE_FR (0 << 6)
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#define TIMER_MODE_PD (1 << 6)
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#define TIMER_INT_EN (1 << 5)
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#define TIMER_PRS_MSK (3 << 2)
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#define TIMER_PRS_8S (1 << 3)
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#define TIMER_SIZE_MSK (1 << 2)
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#define TIMER_ONE_SHT (1 << 0)
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int timer_init (void)
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{
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ulong tmr_ctrl_val;
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/* 1st disable the Timer */
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tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
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tmr_ctrl_val &= ~TIMER_ENABLE;
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*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
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/*
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* The Timer Control Register has one Undefined/Shouldn't Use Bit
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* So we should do read/modify/write Operation
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*/
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/*
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* Timer Mode : Free Running
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* Interrupt : Disabled
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* Prescale : 8 Stage, Clk/256
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* Tmr Siz : 16 Bit Counter
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* Tmr in Wrapping Mode
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*/
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tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8);
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tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
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tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
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*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
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return 0;
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}
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