mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-12 06:12:58 +00:00
a2927e09bc
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
19 lines
481 B
C
19 lines
481 B
C
/*
|
|
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef _SMSC_LPC47M_H_
|
|
#define _SMSC_LPC47M_H_
|
|
|
|
/**
|
|
* Configure the base I/O port of the specified serial device and enable the
|
|
* serial device.
|
|
*
|
|
* @dev: High 8 bits = Super I/O port, low 8 bits = logical device number.
|
|
* @iobase: Processor I/O port address to assign to this serial device.
|
|
*/
|
|
void lpc47m_enable_serial(u16 dev, u16 iobase);
|
|
|
|
#endif /* _SMSC_LPC47M_H_ */
|