u-boot/arch/arm/mach-uniphier/init/init-ld20.c
Masahiro Yamada 0bd20207ab ARM: uniphier: disable cache in SPL of PH1-LD20
The Boot ROM has enabled D-cache and MMU setting DDR memory area
as Normal Memory in its page table.  Disable D-cache and MMU
before jumping to U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:35:26 +09:00

57 lines
813 B
C

/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <spl.h>
#include "../init.h"
#include "../micro-support-card.h"
int uniphier_ld20_init(const struct uniphier_board_data *bd)
{
uniphier_sbc_init_savepin(bd);
uniphier_pxs2_sbc_init(bd);
uniphier_ld20_early_pin_init(bd);
support_card_reset();
support_card_init();
led_puts("L0");
memconf_init(bd);
uniphier_pxs2_memconf_init(bd);
led_puts("L1");
uniphier_ld20_early_clk_init(bd);
led_puts("L2");
led_puts("L3");
#ifdef CONFIG_SPL_SERIAL_SUPPORT
preloader_console_init();
#endif
led_puts("L4");
{
int res;
res = uniphier_ld20_umc_init(bd);
if (res < 0) {
while (1)
;
}
}
led_puts("L5");
dcache_disable();
return 0;
}