mirror of
https://github.com/AsahiLinux/u-boot
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61708bb0a2
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs(). Add new spi_get_bus_and_cs() implementation which rely on DT for speed and mode and don't need any drv_name nor dev_name parameters. This will prepare the ground for next patch. Update all callers to use _spi_get_bus_and_cs() to keep the same behavior. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: "Pali Rohár" <pali@kernel.org> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Anji J <anji.jagarlmudi@nxp.com> Cc: Biwen Li <biwen.li@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
745 lines
24 KiB
C
745 lines
24 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Common SPI Interface: Controller-specific definitions
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*
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* (C) Copyright 2001
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
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*/
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#ifndef _SPI_H_
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#define _SPI_H_
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#include <common.h>
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#include <linux/bitops.h>
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/* SPI mode flags */
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#define SPI_CPHA BIT(0) /* clock phase (1 = SPI_CLOCK_PHASE_SECOND) */
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#define SPI_CPOL BIT(1) /* clock polarity (1 = SPI_POLARITY_HIGH) */
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#define SPI_MODE_0 (0|0) /* (original MicroWire) */
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#define SPI_MODE_1 (0|SPI_CPHA)
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#define SPI_MODE_2 (SPI_CPOL|0)
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#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
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#define SPI_CS_HIGH BIT(2) /* CS active high */
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#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
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#define SPI_3WIRE BIT(4) /* SI/SO signals shared */
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#define SPI_LOOP BIT(5) /* loopback mode */
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#define SPI_SLAVE BIT(6) /* slave mode */
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#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */
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#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */
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#define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */
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#define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
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#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */
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#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
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#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
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#define SPI_TX_OCTAL BIT(14) /* transmit with 8 wires */
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#define SPI_RX_OCTAL BIT(15) /* receive with 8 wires */
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/* Header byte that marks the start of the message */
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#define SPI_PREAMBLE_END_BYTE 0xec
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#define SPI_DEFAULT_WORDLEN 8
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/**
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* struct dm_spi_bus - SPI bus info
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*
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* This contains information about a SPI bus. To obtain this structure, use
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* dev_get_uclass_priv(bus) where bus is the SPI bus udevice.
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*
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* @max_hz: Maximum speed that the bus can tolerate.
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* @speed: Current bus speed. This is 0 until the bus is first claimed.
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* @mode: Current bus mode. This is 0 until the bus is first claimed.
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*
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* TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave.
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*/
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struct dm_spi_bus {
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uint max_hz;
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uint speed;
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uint mode;
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};
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/**
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* struct dm_spi_plat - platform data for all SPI slaves
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*
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* This describes a SPI slave, a child device of the SPI bus. To obtain this
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* struct from a spi_slave, use dev_get_parent_plat(dev) or
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* dev_get_parent_plat(slave->dev).
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*
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* This data is immutable. Each time the device is probed, @max_hz and @mode
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* will be copied to struct spi_slave.
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*
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* @cs: Chip select number (0..n-1)
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* @max_hz: Maximum bus speed that this slave can tolerate
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* @mode: SPI mode to use for this device (see SPI mode flags)
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*/
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struct dm_spi_slave_plat {
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unsigned int cs;
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uint max_hz;
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uint mode;
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};
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/**
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* enum spi_clock_phase - indicates the clock phase to use for SPI (CPHA)
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*
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* @SPI_CLOCK_PHASE_FIRST: Data sampled on the first phase
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* @SPI_CLOCK_PHASE_SECOND: Data sampled on the second phase
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*/
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enum spi_clock_phase {
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SPI_CLOCK_PHASE_FIRST,
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SPI_CLOCK_PHASE_SECOND,
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};
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/**
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* enum spi_wire_mode - indicates the number of wires used for SPI
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*
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* @SPI_4_WIRE_MODE: Normal bidirectional mode with MOSI and MISO
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* @SPI_3_WIRE_MODE: Unidirectional version with a single data line SISO
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*/
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enum spi_wire_mode {
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SPI_4_WIRE_MODE,
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SPI_3_WIRE_MODE,
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};
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/**
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* enum spi_polarity - indicates the polarity of the SPI bus (CPOL)
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*
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* @SPI_POLARITY_LOW: Clock is low in idle state
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* @SPI_POLARITY_HIGH: Clock is high in idle state
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*/
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enum spi_polarity {
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SPI_POLARITY_LOW,
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SPI_POLARITY_HIGH,
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};
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/**
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* struct spi_slave - Representation of a SPI slave
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*
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* For driver model this is the per-child data used by the SPI bus. It can
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* be accessed using dev_get_parent_priv() on the slave device. The SPI uclass
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* sets up per_child_auto to sizeof(struct spi_slave), and the
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* driver should not override it. Two platform data fields (max_hz and mode)
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* are copied into this structure to provide an initial value. This allows
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* them to be changed, since we should never change platform data in drivers.
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*
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* If not using driver model, drivers are expected to extend this with
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* controller-specific data.
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*
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* @dev: SPI slave device
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* @max_hz: Maximum speed for this slave
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* @bus: ID of the bus that the slave is attached to. For
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* driver model this is the sequence number of the SPI
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* bus (dev_seq(bus)) so does not need to be stored
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* @cs: ID of the chip select connected to the slave.
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* @mode: SPI mode to use for this slave (see SPI mode flags)
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* @wordlen: Size of SPI word in number of bits
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* @max_read_size: If non-zero, the maximum number of bytes which can
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* be read at once.
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* @max_write_size: If non-zero, the maximum number of bytes which can
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* be written at once.
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* @memory_map: Address of read-only SPI flash access.
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* @flags: Indication of SPI flags.
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*/
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struct spi_slave {
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#if CONFIG_IS_ENABLED(DM_SPI)
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struct udevice *dev; /* struct spi_slave is dev->parentdata */
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uint max_hz;
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#else
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unsigned int bus;
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unsigned int cs;
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#endif
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uint mode;
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unsigned int wordlen;
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unsigned int max_read_size;
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unsigned int max_write_size;
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void *memory_map;
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u8 flags;
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#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */
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#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */
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#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
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};
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/**
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* spi_do_alloc_slave - Allocate a new SPI slave (internal)
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*
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* Allocate and zero all fields in the spi slave, and set the bus/chip
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* select. Use the helper macro spi_alloc_slave() to call this.
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*
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* @offset: Offset of struct spi_slave within slave structure.
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* @size: Size of slave structure.
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* @bus: Bus ID of the slave chip.
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* @cs: Chip select ID of the slave chip on the specified bus.
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*/
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void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
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unsigned int cs);
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/**
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* spi_alloc_slave - Allocate a new SPI slave
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*
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* Allocate and zero all fields in the spi slave, and set the bus/chip
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* select.
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*
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* @_struct: Name of structure to allocate (e.g. struct tegra_spi).
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* This structure must contain a member 'struct spi_slave *slave'.
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* @bus: Bus ID of the slave chip.
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* @cs: Chip select ID of the slave chip on the specified bus.
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*/
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#define spi_alloc_slave(_struct, bus, cs) \
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spi_do_alloc_slave(offsetof(_struct, slave), \
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sizeof(_struct), bus, cs)
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/**
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* spi_alloc_slave_base - Allocate a new SPI slave with no private data
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*
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* Allocate and zero all fields in the spi slave, and set the bus/chip
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* select.
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*
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* @bus: Bus ID of the slave chip.
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* @cs: Chip select ID of the slave chip on the specified bus.
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*/
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#define spi_alloc_slave_base(bus, cs) \
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spi_do_alloc_slave(0, sizeof(struct spi_slave), bus, cs)
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/**
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* Set up communications parameters for a SPI slave.
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*
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* This must be called once for each slave. Note that this function
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* usually doesn't touch any actual hardware, it only initializes the
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* contents of spi_slave so that the hardware can be easily
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* initialized later.
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*
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* @bus: Bus ID of the slave chip.
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* @cs: Chip select ID of the slave chip on the specified bus.
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* @max_hz: Maximum SCK rate in Hz.
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* @mode: Clock polarity, clock phase and other parameters.
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*
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* Returns: A spi_slave reference that can be used in subsequent SPI
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* calls, or NULL if one or more of the parameters are not supported.
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*/
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode);
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/**
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* Free any memory associated with a SPI slave.
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*
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* @slave: The SPI slave
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*/
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void spi_free_slave(struct spi_slave *slave);
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/**
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* Claim the bus and prepare it for communication with a given slave.
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*
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* This must be called before doing any transfers with a SPI slave. It
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* will enable and initialize any SPI hardware as necessary, and make
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* sure that the SCK line is in the correct idle state. It is not
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* allowed to claim the same bus for several slaves without releasing
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* the bus in between.
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*
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* @slave: The SPI slave
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*
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* Returns: 0 if the bus was claimed successfully, or a negative value
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* if it wasn't.
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*/
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int spi_claim_bus(struct spi_slave *slave);
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/**
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* Release the SPI bus
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*
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* This must be called once for every call to spi_claim_bus() after
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* all transfers have finished. It may disable any SPI hardware as
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* appropriate.
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*
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* @slave: The SPI slave
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*/
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void spi_release_bus(struct spi_slave *slave);
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/**
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* Set the word length for SPI transactions
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*
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* Set the word length (number of bits per word) for SPI transactions.
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*
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* @slave: The SPI slave
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* @wordlen: The number of bits in a word
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*
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* Returns: 0 on success, -1 on failure.
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*/
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int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen);
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/**
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* SPI transfer (optional if mem_ops is used)
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*
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* This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
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* "bitlen" bits in the SPI MISO port. That's just the way SPI works.
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*
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* The source of the outgoing bits is the "dout" parameter and the
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* destination of the input bits is the "din" parameter. Note that "dout"
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* and "din" can point to the same memory location, in which case the
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* input data overwrites the output data (since both are buffered by
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* temporary variables, this is OK).
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*
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* spi_xfer() interface:
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* @slave: The SPI slave which will be sending/receiving the data.
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* @bitlen: How many bits to write and read.
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* @dout: Pointer to a string of bits to send out. The bits are
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* held in a byte array and are sent MSB first.
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* @din: Pointer to a string of bits that will be filled in.
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* @flags: A bitwise combination of SPI_XFER_* flags.
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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void *din, unsigned long flags);
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/**
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* spi_write_then_read - SPI synchronous write followed by read
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*
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* This performs a half duplex transaction in which the first transaction
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* is to send the opcode and if the length of buf is non-zero then it start
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* the second transaction as tx or rx based on the need from respective slave.
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*
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* @slave: The SPI slave device with which opcode/data will be exchanged
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* @opcode: opcode used for specific transfer
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* @n_opcode: size of opcode, in bytes
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* @txbuf: buffer into which data to be written
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* @rxbuf: buffer into which data will be read
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* @n_buf: size of buf (whether it's [tx|rx]buf), in bytes
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*
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* Returns: 0 on success, not 0 on failure
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*/
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int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
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size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
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size_t n_buf);
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/* Copy memory mapped data */
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void spi_flash_copy_mmap(void *data, void *offset, size_t len);
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/**
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* Determine if a SPI chipselect is valid.
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* This function is provided by the board if the low-level SPI driver
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* needs it to determine if a given chipselect is actually valid.
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*
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* Returns: 1 if bus:cs identifies a valid chip on this board, 0
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* otherwise.
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*/
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int spi_cs_is_valid(unsigned int bus, unsigned int cs);
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/*
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* These names are used in several drivers and these declarations will be
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* removed soon as part of the SPI DM migration. Drop them if driver model is
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* enabled for SPI.
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*/
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#if !CONFIG_IS_ENABLED(DM_SPI)
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/**
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* Activate a SPI chipselect.
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* This function is provided by the board code when using a driver
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* that can't control its chipselects automatically (e.g.
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* common/soft_spi.c). When called, it should activate the chip select
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* to the device identified by "slave".
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*/
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void spi_cs_activate(struct spi_slave *slave);
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/**
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* Deactivate a SPI chipselect.
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* This function is provided by the board code when using a driver
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* that can't control its chipselects automatically (e.g.
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* common/soft_spi.c). When called, it should deactivate the chip
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* select to the device identified by "slave".
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*/
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void spi_cs_deactivate(struct spi_slave *slave);
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#endif
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/**
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* Set transfer speed.
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* This sets a new speed to be applied for next spi_xfer().
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* @slave: The SPI slave
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* @hz: The transfer speed
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*/
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void spi_set_speed(struct spi_slave *slave, uint hz);
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/**
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* Write 8 bits, then read 8 bits.
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* @slave: The SPI slave we're communicating with
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* @byte: Byte to be written
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*
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* Returns: The value that was read, or a negative value on error.
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*
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* TODO: This function probably shouldn't be inlined.
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*/
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static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
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{
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unsigned char dout[2];
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unsigned char din[2];
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int ret;
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dout[0] = byte;
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dout[1] = 0;
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ret = spi_xfer(slave, 16, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
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return ret < 0 ? ret : din[1];
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}
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/**
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* struct spi_cs_info - Information about a bus chip select
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*
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* @dev: Connected device, or NULL if none
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*/
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struct spi_cs_info {
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struct udevice *dev;
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};
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/**
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* struct struct dm_spi_ops - Driver model SPI operations
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*
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* The uclass interface is implemented by all SPI devices which use
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* driver model.
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*/
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struct dm_spi_ops {
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/**
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* Claim the bus and prepare it for communication.
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*
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* The device provided is the slave device. It's parent controller
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* will be used to provide the communication.
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*
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* This must be called before doing any transfers with a SPI slave. It
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* will enable and initialize any SPI hardware as necessary, and make
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* sure that the SCK line is in the correct idle state. It is not
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* allowed to claim the same bus for several slaves without releasing
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* the bus in between.
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*
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* @dev: The SPI slave
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*
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* Returns: 0 if the bus was claimed successfully, or a negative value
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* if it wasn't.
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*/
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int (*claim_bus)(struct udevice *dev);
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/**
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* Release the SPI bus
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*
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* This must be called once for every call to spi_claim_bus() after
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* all transfers have finished. It may disable any SPI hardware as
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* appropriate.
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*
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* @dev: The SPI slave
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*/
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int (*release_bus)(struct udevice *dev);
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/**
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* Set the word length for SPI transactions
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*
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* Set the word length (number of bits per word) for SPI transactions.
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*
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* @bus: The SPI slave
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* @wordlen: The number of bits in a word
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*
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* Returns: 0 on success, -ve on failure.
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*/
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int (*set_wordlen)(struct udevice *dev, unsigned int wordlen);
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/**
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* SPI transfer
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*
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* This writes "bitlen" bits out the SPI MOSI port and simultaneously
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* clocks "bitlen" bits in the SPI MISO port. That's just the way SPI
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* works.
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*
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* The source of the outgoing bits is the "dout" parameter and the
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* destination of the input bits is the "din" parameter. Note that
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* "dout" and "din" can point to the same memory location, in which
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* case the input data overwrites the output data (since both are
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* buffered by temporary variables, this is OK).
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*
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* spi_xfer() interface:
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* @dev: The slave device to communicate with
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* @bitlen: How many bits to write and read.
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* @dout: Pointer to a string of bits to send out. The bits are
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* held in a byte array and are sent MSB first.
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* @din: Pointer to a string of bits that will be filled in.
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* @flags: A bitwise combination of SPI_XFER_* flags.
|
|
*
|
|
* Returns: 0 on success, not -1 on failure
|
|
*/
|
|
int (*xfer)(struct udevice *dev, unsigned int bitlen, const void *dout,
|
|
void *din, unsigned long flags);
|
|
|
|
/**
|
|
* Optimized handlers for SPI memory-like operations.
|
|
*
|
|
* Optimized/dedicated operations for interactions with SPI memory. This
|
|
* field is optional and should only be implemented if the controller
|
|
* has native support for memory like operations.
|
|
*/
|
|
const struct spi_controller_mem_ops *mem_ops;
|
|
|
|
/**
|
|
* Set transfer speed.
|
|
* This sets a new speed to be applied for next spi_xfer().
|
|
* @bus: The SPI bus
|
|
* @hz: The transfer speed
|
|
* @return 0 if OK, -ve on error
|
|
*/
|
|
int (*set_speed)(struct udevice *bus, uint hz);
|
|
|
|
/**
|
|
* Set the SPI mode/flags
|
|
*
|
|
* It is unclear if we want to set speed and mode together instead
|
|
* of separately.
|
|
*
|
|
* @bus: The SPI bus
|
|
* @mode: Requested SPI mode (SPI_... flags)
|
|
* @return 0 if OK, -ve on error
|
|
*/
|
|
int (*set_mode)(struct udevice *bus, uint mode);
|
|
|
|
/**
|
|
* Get information on a chip select
|
|
*
|
|
* This is only called when the SPI uclass does not know about a
|
|
* chip select, i.e. it has no attached device. It gives the driver
|
|
* a chance to allow activity on that chip select even so.
|
|
*
|
|
* @bus: The SPI bus
|
|
* @cs: The chip select (0..n-1)
|
|
* @info: Returns information about the chip select, if valid.
|
|
* On entry info->dev is NULL
|
|
* @return 0 if OK (and @info is set up), -EINVAL if the chip select
|
|
* is invalid, other -ve value on error
|
|
*/
|
|
int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info);
|
|
|
|
/**
|
|
* get_mmap() - Get memory-mapped SPI
|
|
*
|
|
* @dev: The SPI flash slave device
|
|
* @map_basep: Returns base memory address for mapped SPI
|
|
* @map_sizep: Returns size of mapped SPI
|
|
* @offsetp: Returns start offset of SPI flash where the map works
|
|
* correctly (offsets before this are not visible)
|
|
* @return 0 if OK, -EFAULT if memory mapping is not available
|
|
*/
|
|
int (*get_mmap)(struct udevice *dev, ulong *map_basep,
|
|
uint *map_sizep, uint *offsetp);
|
|
};
|
|
|
|
struct dm_spi_emul_ops {
|
|
/**
|
|
* SPI transfer
|
|
*
|
|
* This writes "bitlen" bits out the SPI MOSI port and simultaneously
|
|
* clocks "bitlen" bits in the SPI MISO port. That's just the way SPI
|
|
* works. Here the device is a slave.
|
|
*
|
|
* The source of the outgoing bits is the "dout" parameter and the
|
|
* destination of the input bits is the "din" parameter. Note that
|
|
* "dout" and "din" can point to the same memory location, in which
|
|
* case the input data overwrites the output data (since both are
|
|
* buffered by temporary variables, this is OK).
|
|
*
|
|
* spi_xfer() interface:
|
|
* @slave: The SPI slave which will be sending/receiving the data.
|
|
* @bitlen: How many bits to write and read.
|
|
* @dout: Pointer to a string of bits sent to the device. The
|
|
* bits are held in a byte array and are sent MSB first.
|
|
* @din: Pointer to a string of bits that will be sent back to
|
|
* the master.
|
|
* @flags: A bitwise combination of SPI_XFER_* flags.
|
|
*
|
|
* Returns: 0 on success, not -1 on failure
|
|
*/
|
|
int (*xfer)(struct udevice *slave, unsigned int bitlen,
|
|
const void *dout, void *din, unsigned long flags);
|
|
};
|
|
|
|
/**
|
|
* spi_find_bus_and_cs() - Find bus and slave devices by number
|
|
*
|
|
* Given a bus number and chip select, this finds the corresponding bus
|
|
* device and slave device. Neither device is activated by this function,
|
|
* although they may have been activated previously.
|
|
*
|
|
* @busnum: SPI bus number
|
|
* @cs: Chip select to look for
|
|
* @busp: Returns bus device
|
|
* @devp: Return slave device
|
|
* Return: 0 if found, -ENODEV on error
|
|
*/
|
|
int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
|
|
struct udevice **devp);
|
|
|
|
/**
|
|
* spi_get_bus_and_cs() - Find and activate bus and slave devices by number
|
|
*
|
|
* Given a bus number and chip select, this finds the corresponding bus
|
|
* device and slave device.
|
|
*
|
|
* @busnum: SPI bus number
|
|
* @cs: Chip select to look for
|
|
* @busp: Returns bus device
|
|
* @devp: Return slave device
|
|
* @return 0 if found, -ve on error
|
|
*/
|
|
int spi_get_bus_and_cs(int busnum, int cs,
|
|
struct udevice **busp, struct spi_slave **devp);
|
|
|
|
/**
|
|
* _spi_get_bus_and_cs() - Find and activate bus and slave devices by number
|
|
* As spi_flash_probe(), This is an old-style function. We should remove
|
|
* it when all SPI flash drivers use dm
|
|
*
|
|
* Given a bus number and chip select, this finds the corresponding bus
|
|
* device and slave device.
|
|
*
|
|
* If no such slave exists, and drv_name is not NULL, then a new slave device
|
|
* is automatically bound on this chip select with requested speed and mode.
|
|
*
|
|
* Ths new slave device is probed ready for use with the speed and mode
|
|
* from plat when available or the requested values.
|
|
*
|
|
* @busnum: SPI bus number
|
|
* @cs: Chip select to look for
|
|
* @speed: SPI speed to use for this slave when not available in plat
|
|
* @mode: SPI mode to use for this slave when not available in plat
|
|
* @drv_name: Name of driver to attach to this chip select
|
|
* @dev_name: Name of the new device thus created
|
|
* @busp: Returns bus device
|
|
* @devp: Return slave device
|
|
* Return: 0 if found, -ve on error
|
|
*/
|
|
int _spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
|
|
const char *drv_name, const char *dev_name,
|
|
struct udevice **busp, struct spi_slave **devp);
|
|
|
|
/**
|
|
* spi_chip_select() - Get the chip select for a slave
|
|
*
|
|
* Return: the chip select this slave is attached to
|
|
*/
|
|
int spi_chip_select(struct udevice *slave);
|
|
|
|
/**
|
|
* spi_find_chip_select() - Find the slave attached to chip select
|
|
*
|
|
* @bus: SPI bus to search
|
|
* @cs: Chip select to look for
|
|
* @devp: Returns the slave device if found
|
|
* Return: 0 if found, -EINVAL if cs is invalid, -ENODEV if no device attached,
|
|
* other -ve value on error
|
|
*/
|
|
int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp);
|
|
|
|
/**
|
|
* spi_slave_of_to_plat() - decode standard SPI platform data
|
|
*
|
|
* This decodes the speed and mode for a slave from a device tree node
|
|
*
|
|
* @blob: Device tree blob
|
|
* @node: Node offset to read from
|
|
* @plat: Place to put the decoded information
|
|
*/
|
|
int spi_slave_of_to_plat(struct udevice *dev, struct dm_spi_slave_plat *plat);
|
|
|
|
/**
|
|
* spi_cs_info() - Check information on a chip select
|
|
*
|
|
* This checks a particular chip select on a bus to see if it has a device
|
|
* attached, or is even valid.
|
|
*
|
|
* @bus: The SPI bus
|
|
* @cs: The chip select (0..n-1)
|
|
* @info: Returns information about the chip select, if valid
|
|
* Return: 0 if OK (and @info is set up), -ENODEV if the chip select
|
|
* is invalid, other -ve value on error
|
|
*/
|
|
int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info);
|
|
|
|
struct sandbox_state;
|
|
|
|
/**
|
|
* sandbox_spi_get_emul() - get an emulator for a SPI slave
|
|
*
|
|
* This provides a way to attach an emulated SPI device to a particular SPI
|
|
* slave, so that xfer() operations on the slave will be handled by the
|
|
* emulator. If a emulator already exists on that chip select it is returned.
|
|
* Otherwise one is created.
|
|
*
|
|
* @state: Sandbox state
|
|
* @bus: SPI bus requesting the emulator
|
|
* @slave: SPI slave device requesting the emulator
|
|
* @emuip: Returns pointer to emulator
|
|
* Return: 0 if OK, -ve on error
|
|
*/
|
|
int sandbox_spi_get_emul(struct sandbox_state *state,
|
|
struct udevice *bus, struct udevice *slave,
|
|
struct udevice **emulp);
|
|
|
|
/**
|
|
* Claim the bus and prepare it for communication with a given slave.
|
|
*
|
|
* This must be called before doing any transfers with a SPI slave. It
|
|
* will enable and initialize any SPI hardware as necessary, and make
|
|
* sure that the SCK line is in the correct idle state. It is not
|
|
* allowed to claim the same bus for several slaves without releasing
|
|
* the bus in between.
|
|
*
|
|
* @dev: The SPI slave device
|
|
*
|
|
* Returns: 0 if the bus was claimed successfully, or a negative value
|
|
* if it wasn't.
|
|
*/
|
|
int dm_spi_claim_bus(struct udevice *dev);
|
|
|
|
/**
|
|
* Release the SPI bus
|
|
*
|
|
* This must be called once for every call to dm_spi_claim_bus() after
|
|
* all transfers have finished. It may disable any SPI hardware as
|
|
* appropriate.
|
|
*
|
|
* @slave: The SPI slave device
|
|
*/
|
|
void dm_spi_release_bus(struct udevice *dev);
|
|
|
|
/**
|
|
* SPI transfer
|
|
*
|
|
* This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
|
|
* "bitlen" bits in the SPI MISO port. That's just the way SPI works.
|
|
*
|
|
* The source of the outgoing bits is the "dout" parameter and the
|
|
* destination of the input bits is the "din" parameter. Note that "dout"
|
|
* and "din" can point to the same memory location, in which case the
|
|
* input data overwrites the output data (since both are buffered by
|
|
* temporary variables, this is OK).
|
|
*
|
|
* dm_spi_xfer() interface:
|
|
* @dev: The SPI slave device which will be sending/receiving the data.
|
|
* @bitlen: How many bits to write and read.
|
|
* @dout: Pointer to a string of bits to send out. The bits are
|
|
* held in a byte array and are sent MSB first.
|
|
* @din: Pointer to a string of bits that will be filled in.
|
|
* @flags: A bitwise combination of SPI_XFER_* flags.
|
|
*
|
|
* Returns: 0 on success, not 0 on failure
|
|
*/
|
|
int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
|
|
const void *dout, void *din, unsigned long flags);
|
|
|
|
/**
|
|
* spi_get_mmap() - Get memory-mapped SPI
|
|
*
|
|
* @dev: SPI slave device to check
|
|
* @map_basep: Returns base memory address for mapped SPI
|
|
* @map_sizep: Returns size of mapped SPI
|
|
* @offsetp: Returns start offset of SPI flash where the map works
|
|
* correctly (offsets before this are not visible)
|
|
* Return: 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not
|
|
* available
|
|
*/
|
|
int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
|
|
uint *offsetp);
|
|
|
|
/* Access the operations for a SPI device */
|
|
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
|
|
#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
|
|
|
|
#endif /* _SPI_H_ */
|